MiSTer FPGA Forum

Hi all,

I am using the update_all script. But every time it removes all my CRT filters and shadow masks from the SD card and I need to upload it again.

Is there any reason why that is removed every time, and can I instruct the updater to leave them in place?

Okay, my issue could get fixed with the help of this:

viewtopic.php?f=33&t=303

The use of the repeater solved the voltage issues of the De10-Nano.

I ordered this one:

http://www.amazon.de/dp/B0876HF1XB/

Why not go the way of the MT32-Pi ? Call it the GUS-Pi. Infact, why not have many different soundcards to select from, on the Pi ? MIDI data has very low bandwidth requirements compared to audio. Just saying. I have no idea if it would be a problem. The GUS has no midi input , so no game or any other native software would ever work. The GUS CPU ha...

ive managed to rectify it so consider it solved. I have the same issue with the latest MISTer release and have not found out anything how to get it back to work. It is starting good but loosing sync intermittently. That is quite new for me, and I never had it before. I now choose different kabels to the same Monitor, but no success. What did it re...

@rickdangerous I do have a case from you and he idea with internal power supply from the MISTER barrel bracket down to the USB board is ingenious. However I struggle with the upper body part. I can see three are LEDs in the top that are soldered to some pads correctly. But I cannot see any connection for the LEDs going to the IO HUB? So is it suppo...

/Edit: Ignore ...
I used the update_all.sh script to get Bubble Bobble going, but it is the JP version on it. So I am having a hard time reading the text ...

Is there any way to replace the ROM with the US version?


For anyone else stumbling accross. This is just a DIP switch to switch to english ...

Great, thanks for the explanation. I will give this a try. Also I will use only one clock from PLL and setup a divider to stay in phase and ensure that the video clock is in sync with the CE_PIX clock.

Keep you posted on this.

Hi all, I cannot get my head around how video output works on MISTER. In my learning experience I try to follow the book: "Designing Video Game Hardware in Verliog". The first chapter is to setup a screen output, as this is needed to see anything (whatever you want to display). So it starts with two simple counters for H-Sync and V-Sync a...

No nothing happend with it. I am now coming back to this myself. What i am missing the most is good commented code, esp. for the mister framework. For instance, there is a ready to use arcade_video.v file. But without the comments I do not understand what it does. And I could also not find any other documentation on what it does. So I have issues t...

Thanks for your input on this. I ordered a copy of Verilog by Example ... that should get me inside of it deep enough :-) You are right, the 1'd0 stuff confused me (now understood) and also that nothing is written out (e.g. Term ? option1 : option 2 ...) nice for typing bad for reading. I also do not see any difference in the if then things. That e...

Thanks @nullobject, really appreciated. I am beginning my way into all of that hardware world and started a hack computer with VHDL, now trying to run it on Mister. Now I am struggeling if I should now do everything again in Verilog. I have a hard time to understand anything in any of the cores that are implementing a simple vga screen as that sect...

I did not wanted to start a „which one is better“ it is to much objection and preference, than anything else. But it answers my question somehow. As Sorgelig would not write anything in VHDL he never thought about doing it in VHDL. From my perspective having more or less no knowledge about Verilog it looks to me very hard to read and difficult to u...

Okay, thanks guys, that is really helpful. As said I am not looking to rework anything in sys ... and appreciate the input. that is a very good starting point. Also consideration on porting mister to the next (maybe bigger platform) is just out of any reachable scope for me for now. I am happy if I start to understand how everything fits together a...

One question for the beginning:

I will do this in VHDL. Is there any reason why the top file is verilog? Is it just because no one found the need to translate it into vhdl? In other words could I use a hack.vhd instead of the hack.sv (templated version)?

Has any core already a vhd implementation of the main file?

Hi all, after trying to get into Mister Development I believe it is time to create a Development Guide. We also would need a System Guide (how everything works) and a API/Implementation guide (which signals end up where and what they are used for). Currently to my awareness non of that is available. So I decided I can help the most by now by creati...

I can also recommend this book , which is a fairly gentle intro to arcade hardware in Verilog. It covers fundamental things like CPU, memory, video hardware, tilemaps, sprites, etc. You can run their example code in your browser, which is nice for playing around with the concepts they cover. @nullobject, as this is Verilog and also the top Level o...

Ignor me ... found the other thread on book recommendations.