MiSTer FPGA Forum

The ZX Next core of Mister requires of 2 MB of SRAM to work
The only Dual RAM module for Mister is the 32 MB SDRAM + 2 MB SRAM, sorry.
So, there is not other option for SRAM

Regards

The Main problem of ZXUNo core is the data contained in the SPI Flash
In the SPI Flash the core reads:
- The ROMs
- The ESXDOS rom
- Several data configurations of the core
So, first we have to solve that part.

I got it from DB9 module https://github.com/Miguel-T80c/Genesis_MiSTer/blob/master/joydb9md.v . This module is clocked at 50Mhz and it divides the clock by 256 for the joystick state counter which results in 195.3Khz (0.00512ms per state). The joystick state counter counts from 0-255 and it saves the joystick buttons at state 0-6: 256 x 0.00512ms ...

One important thing to point out !!! The original file zxnext_top_issue2.vhd (similar to our zxnext_Mister.vhd file ), in line 1011, has defined the address as sram_addr <= (zxn_ram_a_addr(20) & zxn_ram_a_addr(0) & zxn_ram_a_addr(19 downto 1)) when zxn_ram_b_req = '0' else (zxn_ram_b_addr(20) & zxn_ram_b_addr(0) & zxn_ram_b_addr(19 ...

To accelerate the implementation of the ZX Next core I have published in my GitHub the actual core. https://github.com/benitoss/ZXNext_Mister The core needs to use the second SD or the VHD image that you can get here : https://github.com/benitoss/ZXNext_Mister/raw/master/extra/zx_next_vhd.zip Actually it only uses 400 Kb of BRAM Memory, we only nee...

Here You have the two screens of configuration photo_2020-06-10_22-54-09.jpg photo_2020-06-10_22-54-19.jpg Everything is working now ( VGA (15 Khz and 31 Khz), HDMI, Keyboard, joysticks, sound , and the second SD or VHD file) unless the 2 MB of memory in SDRAM. All tests done in BRAM (maximum 400 Kb available) are good but the system has not enough...

if some app/game will change layer 2 position very fast, then you won't have time to re-load layer2 into BRAM. 256x192 is standard Spectrum dot clock 7MHz. SDRAM is 16bit, so every word will be fetched at 3.5MHz. If you will use 2-word burst then fetch will be every 1.75MHz. This is pretty much comfortable access time for SDRAM working at around 1...

Need to see what communication channel is used for RPi. If it's UART then MiSTer already provides this communication, so just need to add linux app servicing Next commands. AFAIK RPi is optional feature. It has nothing to do with ZX emulation. The communication channel used between the FPGA and Pi is serial (UART), but the Pi transmit the audio ba...

Where i can read technical info about Next video modes? I need to know which video modes are supported and where video frame buffers can be. You have a lot of information in the ZX Spectrum Next Wiki. Here https://wiki.specnext.dev/Memory_map you have the map memory The layer2 and shadow layer2 spend continuous 3 banks of 16KB each (in total 6 con...

Every day I am closer
Step by step

As you can see in the pictures the core can read the VHD image and load the firmware of the TBLue and several files of the VHD image file. Now I am working in the memory part, the idea is similar than the Spectum core. The initial memory logic is done as a dual port but everything goes to the SRAM. So, we need to put the vram memory (16 Kb block X ...

Direct port with just external tweaks is impossible. But i'm sure with some deep modification of ram handling inside the core the port is possible. MiST and its clones are in the same boat and will require the same in-dept changes to port the Next, so i suggest to widen your search for someone to port. If someone will port it to MiST, then it will...