MiSTer FPGA Forum

Does the GND1 pin on the unoxt card slot 6 pin drop to GND?
I don't know why, but apparently it is connected to the fpga port(N11).

The work to recognize the SD card is done only on the cmd line; the dat line will remain high until then.

I forgot to push this commit yesterday.
The bus endianness may be the opposite of that of the Mister core.
https://github.com/kitune-san/PCXT_DeMi ... 84e8239149

Please check that CMD changes at the same time as the falling edge of CLK.
In the figure below, the waveform looks sluggish, but this is because a passive probe is connected. Ignore it for now.

Could you please check the waveforms (SD_SCLK, SD_MOSI) immediately after resetting the core?

If the waveform is as follow, the SD card is not recognized.

The following is a normal case.

If anything other than the above is the case, some command has failed.

Thanks for the information.
Next we will work on getting the waveforms and steadily correcting my errors.

• Check between xtbus-ide. trigger ide0_chipselect_n and see if data read/write is occurring.
• Check the hdd bus; monitor the hdd_* signal and see if any communication is occurring.

It seems difficult to analyze further.

One last thing, since the following signal is in reg.
Could you try changing it to wire or back to 1'b1?

Thank you.

Oops! commented out...

Wrong, system_2MB
I am a little confused.

Just to be sure, the top-level module is unoxt_top, correct?

After reverting the changes, could you make the following changes to slow down the clock?

I made the following repo of my previous suggestions.
I have not been able to debug because I have not prepared a build environment and I do not have a development board. Sorry.

https://github.com/kitune-san/PCXT_DeMi ... suggestion

The following wires would be connected to data_io.

At this time, if the SD card is not recognized, the KFMMCIDE identifier will not be displayed.
I'm busy and will continue later.

Thanks for the information.
The port input/output settings need to be reviewed.
In native mode change some ports to inout.
I will write down the specific changes after I finish today's work.

I believe that native mode (same implementation as MiSTer) can be used with ZXUno without the need to implement SPI.

I will look for ZXUno to see if I can buy it (and deliver it to Japan).

I upload modified version of the Verify command.

The write speed took 17ms per 512bytes on my chip (SDSC 2GB).
512/17ms = 30kByte/s.
If clock speed could be increased, I think it could be improved a little more.

spark2k06 wrote: ↑Sun Feb 26, 2023 8:08 am

... because entering the FDISK and trying to do some operation from there, it has been hung in the section of creating a partition.

ATA Command 0x40 was incorrectly implemented.
This is probably why fdisk stops.

Apparently, according to my research, MMC's DAT1-7 is pulled up inside the card.
Probably the same for SD cards.

not even to resistors.!?

If this point is 3.3V, then the same module as the MiSTer should be available.

Sorry, I do not maintain the SPI module, so I cannot give you proper advice at this time.

sd_clk=SDIO_CLK
sd_mosi=SDIO_CMD
sd_miso=SDIO_DATA0
DAT1-3=HIGH

spark2k06 wrote: ↑Sun Feb 26, 2023 8:08 am

I will be doing the port of this development to the ZXUno, so that it works directly with the SD, instead of serdrive... I will tell you the results.

If pull-up is connected to the SD ports of the ZXUno, try the following changes.
It may improve the access speed.

I will investigate the cause of the problem. It will take time to resolve the issue.

I created a new topic.

viewtopic.php?t=6204