MiSTer FPGA Forum

Alynna

alright, i'll keep watching your branch and stay on hold. The new syscycle state machine might the 65816 compatible part i'm working on, actually work right when included in the SuperCPU128DX.

Alynna

Note that in SuperCPU128DX, the VDC RAM can be seen by the MMU, by an expansion register that tells the VDC where to find its 64K RAM in the 16mb available. This does what one would expect:

The VDC can be page-flipped
The VDC RAM can be POKEd into without having to go through D600/D601
I would like to backport this functionality at some point.

Alynna

This is what I would like to submit: The 8732 24/32 bit MMU. As currently implemented. Would like to backport this. When used in a C128, it is entirely register compatible. However some Registers havbe been given additional functions. Because of certain mappings, the default memory available currently is 8mb. Once it is decided where the expansion ...

Alynna

Comparing C128 core and C128 real hardware, I was testing the core and what called my attention was that the Vic II-e does not work correctly when using the $d030 trick and the CPU at 2 MHz. Yes I know. This is even listed as a todo in the README Is it permissible for me to contribute to this core yet? I have been waiting for things to stabilize b...

Alynna

SuperCPU128 is giving me alot of ideas about what to do when its time to port this core. I am now looking at 28mhz CPU speed, instead of 33 or 40, because it is much easier to sync up with NTSC signal. Expected available speeds will be 1.03mhz, 2.06, 3.57. 7.16, 14.32. amd 28.65mhz. I don't want to promise 57.14mhz, but it is not completely impossi...

Alynna

To be honest, who cares if the C64 support isn't good. We have a C64 core for that. If/When I get around to the C65 core (SuperCPU128 is a much more attractive project for me at the moment) I will not bother with trying to make the C64 part work. It is a waste of logic elements. Though who knows, maybe i'll find a way to just load the C64 core when...

Alynna

OK the most interesting use case, and why I want to implement it, is because the SD2IEC supports the .dnp "CMD partition" style file system that supports up to 16mb filesystems. Its not just useful for CommodoreOS but also for GEOS 3.3, Wheels, and a number of other things. In fact, like the CMD-HD, the SD2IEC is capable of exposing up to...

Alynna

Caldor wrote: ↑Fri Oct 28, 2022 12:57 pm If you get the SD2IEC to work for this core, would a similar solution not also work for the C64 core?

Yes, it can be backported.

Alynna

Due to the VDC sharing main memory on the SCPU128DX, it would be possible to use the SuperFX chip with both the VIC and the new VDC.

Alynna

Since this would be relatively straightforward to add as well (the code already exists for it and it doesn't require me to figure out the IRQ interfacing) I have this on the boilerplate as well, and it might even come before 65816 support... $D680 ------------- SuperCPU128DX "Krystal" SuperFX chip from SNES ------------------- (SNES ADDRE...

Alynna

One of the things I am looking at doing is implementing the SD2IEC. I *do* actually have one of those. That would be really nice, there has been a lot of talk recently about SD2IEC support for the Commodore cores. If/When I end up working on it, expect that it will use the "Secondary SD card" interface, and the code to run it taken strai...

Alynna

I am thinking of temporarily rolling back to 8502 to get some more features implemented. I recently bought a USB oscilloscope to analyze the problem with 85816 (It boots, the C128 screen shows up, but IRQ timing is really messed up, really no change in status there) and without a SuperCPU 128 to compare to, i'm making educated guesses as to what it...

Alynna

I just got a new job so alot of stuff is on pause, but its on my todo still.

Alynna

I should reiterate that it's important to track this document for updates on capabilities, as well as see the official memory map i'm attempting. https://docs.google.com/document/d/1Ab9Q0zXdCDJ5DXlNZh6Qlqdqx03O3iTJS1F1ydemyDk/edit Right now I am not implementing the full 32 bit modes and bus, this will be far easier to do once many of the other fea...

Alynna

It would be nice if an administrator could rename this thread... I'd like to name it:
SuperCPU128DX MiSTer

Alynna

There isn't much news to give for an update. I found out that my timing issue is more than just the IRQ/NMI conflict. I am currently using the 65816 core from the SNES, but it does not seem to have the same timing as the SuperCPU did. The easiest way for me to resolve this is to give the SNES CPU the same timing as the 8502 for its instructions but...

Alynna

+1 for not having "[C]128" in the name You do great work but perhaps you could consider staying in your own thread. You asked Alynna to make her own thread, which she did but now you keep coming into her thread making comments which frankly seem a little bit negative. I do appreciate the defense here, but I really don't want to scare eri...

Alynna

What I surmise is currently happening is that theres an NMI_ACK signal the rest of the core wants, but there is no natural NMI signal acknowledgment pin from the 65816.

However I have found the signal NMI_SYNC inside the CPU, which I believe I can expose to the rest of the core to give it an NMI ACK. We'll see soon enough.

Alynna

40 column. 85816 CPU. Starts up. No cursor, no keyboard, but it is started.

: vlcsnap-2022-08-08-22h31m29s696.png (83.17 KiB) Viewed 3522 times

One key responds. Restore.

: vlcsnap-2022-08-08-22h32m16s002.png (133.32 KiB) Viewed 3522 times

I believe all I need to do is debounce NMI.
Its only a matter of time now.

Alynna

I am so very close now.
Almost all issues can be traced to NMI handling now. I need to extend a path into the 65816 to get a proper NMI acknowledgment signal. I will take some screenshots...

Alynna

Current awesome challenges:
The 65816 has a ready output that must be respected. I am trying to find the best place to cycle-stretch so that the rest of the core is accessing the CPU only when rdy_out is high.

The 65816 has no NMI_ACK signal. I'm trying to fake it for the cartridge port.

Alynna

Most the work is done and it is booting (not correctly) on the 85816 CPU, in that you can tell its definitely executing instructions. Currently I believe the issue is that, the 65816 has a ready out signal, as well as a VPA/VDA signal, to tell the outside world that what's on its address bus is OK and that its ready to proceed. The current code doe...

Alynna

If the core would be incompatible with the handful of C128 only releases existing in the wild, naming it C128 would make zero sense. That doesn't sound logical to me. See: Wont that break compatibility ? Only with things that use illegal opcodes. You are trading it for SuperCPU compatibility, though. There are less than 200 known C128 only program...

Alynna

Removing C128 from the name makes no sense IMO and would only cause confusion. If the core would be incompatible with the handful of C128 only releases existing in the wild, naming it C128 would make zero sense. That doesn't sound logical to me. But actually I think the end result of both projects should be a single C128 core with SuperCPU and oth...

Alynna

I am going with SuperCPU128DX. I am patching stuff back together after the rename as well.

Alynna

https://www.protovision.games/md/traile ... anguage=en

Here is another example of the kind of application I am trying to support with this port.

Alynna

Since you're making breaking changes, calling it C129 might make that clearer. If it was fully backward compatible, then 128DX would make sense, and it wouldn't matter much which core people used. But with a completely different CPU that doesn't duplicate the undocumented opcodes, using a name that's obviously "wrong" might save some fol...

Alynna

It's already called C128DX, which seems enough to differentiate it from the "normal" C128 cores (of which there are now 2 under development). Ha apparently not different enough as I, my self, got confused today on the two different threads.. The reason I called it C128DX, is because the C65 was originally called the C64DX. :) Since this ...

Alynna

I came here to post just to notify that I have been synchronizing with the C128_Mister code. It takes time because I have to go file by file in VS code, look at my changes and his changes side by side, and decide what to incorporate. I just threw away my attempt to implement 1571, since he declared he was already doing it. Most of my current focus ...

Alynna

I came here to post just to notify that I have been synchronizing with the C128_Mister code. It takes time because I have to go file by file in VS code, look at my changes and his changes side by side, and decide what to incorporate. I just threw away my attempt to implement 1571, since he declared he was already doing it. Most of my current focus ...

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