MiSTer FPGA Forum

somhi

updated main branch with all latest changes from adding IDE to DeMiSTify and minor others
Now it can load images through IDE that were getting stuck before, thanks to Gyurco fix in MiST firmware, and Alastair M.Robinson porting it to DeMiSTify.

somhi

kitune-san wrote: ↑Mon Mar 20, 2023 3:32 am

some comments from Gyurco you might want to read
https://atari-forum.com/viewtopic.php?p ... 7e#p444744

somhi

However, stop keyboard input and beeping are problems. This also occurs with MiSTer. (Especially when using the 5160BIOS.) Those days keyboard seems to be working fine, but just when I'm using the XT-IDE BIOS and want to load something from COM ports (serdrive) I must press the ALT key continously. That seems to be a problem, as after that the key...

somhi

By the way, are there any constraints for the direct(?) PS/2 port written in the SDC file? If not, and if the input results are unstable, writing constraints may improve the issue. I just have those constraints for PS2 FPGA pins: set FALSE_OUT {LED[*] SIGMA_* PS2_* .......} set FALSE_IN {KEY[*] SW[*] PS2_* .........} set_false_path -to ${FALSE_OUT...

somhi

keyboard repetition... I do not remember what it was. Sorry. I'm busy today and tomorrow, so I may not be able to reply. When you press a key for long time, eg "b", with MiST framework, it only prints one "b" in the screen. With keyboard attached directly to the core (demistified ports), it prints lots of "bbbbbbbbb"....

somhi

Please try it. if you have time. https://github.com/kitune-san/PCXT_DeMiSTify/commit/db71659bc74cfb8f57d1037401991e37cd149685 Thanks! That is working perfectly fine either in Deca or Deca_MiST ports. I've updated the devel branch with it and cleaned redundant code also. I still have KFPS2KB and KFPS2KB_direct which maybe could be merged in one. Yo...

somhi

Aitor, kitune-san, you might check if following commit by Gyurco is of interest in PCXT MiSTer core also.

https://github.com/somhi/PCXT_DeMiSTify ... 12cd8d5f87

somhi

https://youtu.be/OSOuhu4ImLg
Testing unified CGA / MDA VRAM memory seems to work quite well.
Now is even possible to change video mode on the fly.

somhi

I will try KFPS2KB_direct also on a MiST port and see what the difference is.

EDIT: Did not work that module with MiST ports as appeared the keyboard controller error anyway

somhi

I'm happy to let you know that I finally managed to boot HD image with a particular geometry using the MiST IDE like Gyurco did.
My image that It was working well with serdrive didn't work, but the freedos image from the mister repository did work.
Gyurco implemented a geometry table in the MiST firmware

somhi

About the keyboard: The XT keyboard returns 0xAA when it receives a reset signal. When the MiSTer core receives the reset pulse from the CPU, it sends 0xFF to the PS/2 keyboard to receive (0xFA)0xAA. I thought this would be useful for detecting keyboard not connected, but it actually seems to be an annoying feature. I think changing the keyboard m...

somhi

About the keyboard: The XT keyboard returns 0xAA when it receives a reset signal. When the MiSTer core receives the reset pulse from the CPU, it sends 0xFF to the PS/2 keyboard to receive (0xFA)0xAA. I thought this would be useful for detecting keyboard not connected, but it actually seems to be an annoying feature. I think changing the keyboard m...

somhi

MiSTerPCXT used a specific table for geometry calculation(storage CHS). However OS seems to have already booted, so it may not be related to this issue. https://github.com/MiSTer-devel/Main_MiSTer/blob/master/support/x86/x86.cpp#L54-L198 some updates from this post https://atari-forum.com/viewtopic.php?p=444148&sid=a2948d8722b03aaf23b589cc225d...

somhi

some updates, OS already booting, but freezing thereafter.

somhi

more debugging from Gyurco at https://atari-forum.com/viewtopic.php?p=444112#p444112

Missing images for you
However looks like it starts to correctly execute the MBR from 7c00:

: pcxt1.png (73.86 KiB) Viewed 4156 times

somhi

kitune-san wrote: ↑Mon Mar 06, 2023 11:49 pm
The fix suggested by slingshot2 in the atari forum may solve the problem

Good news is that we sorted out the CHS boot sector problem, so now it loads the right CHS 0:0:1.

Bad news, is that it gets stuck booting after reading the boot sector.

Tried in SiDi (thanks Carlos) and Deca_MiST targets with different boot images.

somhi

ok perfect. We will find out what is happening, with your help and Slingshot's help on Atari-forums.
All updates on my side go to the new mist branch https://github.com/somhi/PCXT_DeMiSTify/tree/mist

somhi

RAW image; I don't think it starts with H=2. As confirmed by Mister before, you can see that CHS=0/0/1 is read out as the boot sector. Looking at the somhi waveform, I see that the core is writing 0xA0 to 0x306. This means that core is writing H=0. However, it may have changed just before the write command, so if you like, take the trigger under t...

somhi

Is it possible to add the following code to IDE.v and see the signal with Signaltap like MiSTer above? Output corresponding to write_device_head stp (address 306): ksnip_20230306-210038.png cylinder = {tfr[5], tfr[4]} = 0h dev_head = tfr[6] = A0h sector = tfr[3] = 01h Output corresponding to write_sector_count stp (address 302): ksnip_20230306-215...

somhi

t More comments from Gyurco: 0/0/1 should be the MBR (and partition table), why does it start with H=2 now? It might disregard the partition table, and automatically assumes a FAT boot sector at 0/2/1? Then the different geometry problem comes in. Looks like the firmware assumes sectors/cylinder=63. What should be used for your image? BTW, head is...

somhi

kitune-san wrote: ↑Mon Mar 06, 2023 2:21 pm
Is it possible to add the following code to IDE.v and see the signal with Signalap like MiSTer above?

That should be no problem. I'll add that tonight and see if it confirms the debug data that the MiST firmware is showing, which is CHS 0/2/1.

somhi

I don't know why. It looks to me as follows. Do I need to register as a user? Those are the relevant images from atari-forums: getting SS4 low and some data: ksnip_20230305-223529.png You can try to dump only SS4, hdd_data_wr, hdd_data_out to see the whole transfer: ksnip_20230305-225515.png I have found the pattern from signaltap on the real imag...

somhi

Well, I am not the author of universalbios, so I can't say for sure, but I believe that if the BIOS is working right, it will read the boot sector first. I suspect that the correct values are not being written to each register (drive, sector number, sector count, cylinder). I am going to add each register to Signaltap. Ok, good. Regarding atari-fo...

somhi

attached image from some posts above.

somhi

I can't see the image for some reason. (Permissions? I think bios reads the first sector first. We need to make sure the correct values are written to each register(drive, sector number, sector count, cylinder). Don't know why you can't see the image. Try open image in a new tab. The image shows the trigger at the conditions you said so that is wo...

somhi

After that I changed .hdd0_ena (2'b11), to .hdd0_ena (2'b10), and now I'm getting not found again on both master and slave From slingshot: "If master and slave query gave the same results, that means that write to 0x306 is lost somewhere." Debug info from MiST firmware https://atari-forum.com/viewtopic.php?p=444047#p444047 please check f...

somhi

Reading the status register seems to be working well. 0x50 means that the READY flag is up. The XTIDE BIOS uses the Base (cmd block) address as 0x300. This means that the command register is 0x307. https://www.xtideuniversalbios.org/#MenuitemsonxxxIDEControllersubmenus If you want to check if the command is actually written, you should trigger on ...

somhi

After that I changed .hdd0_ena (2'b11), to .hdd0_ena (2'b10),
and now I'm getting not found again on both master and slave

Ok, changing to .hdd0_ena (2'b01), now it only detects Master

somhi

Are you using the same XTIDEBIOS as MiSTer? BIOS ROMs created in the early stages of MiSTerPCXT development may not work properly because the settings do not match. Well, I was sure that I updated the roms to those of MiSTer, but today I did a git pull on PCXT MiSTer repo and the ROM files have been updated. Tried them, and now I got some progress...

somhi

some comments from slingshot over the MiST forum:

Is the BIOS writes to the IDE command register (1F7H)? If it does, then it should trigger bsy (hdd_cmd_req), and the ARM firmware, compiled with HDD Debug support should dump the task file registers.
If it doesn't write any commands, does it even check the status register (read 1F7H)?

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