MiSTer FPGA Forum

You can't purchase hdmi transmitter components unless you're a HDMI adopter (See https://www.analog.com/en/products/adv7535.html ) :cry: I guess that's a relatively new thing, because I'm sure I remember ADV7511/13 being normally stocked products at major distributors a few years ago. It looks like...

While DVI-D would be bigger than HDMI, DVI-I should be smaller than HDMI + VGA, at the cost of requiring (passive) adapters for both of those. DVI also doesn't carry CEC signals. While it would be cool to have CEC support, lacking it altogether would still be an improvement over DE10-Nano screwing i...

They haven't disappeared; the links in the video description just have extra crap at the end for some reason.

https://twitter.com/Laxer3A
https://twitter.com/ultraembedded
https://www.patreon.com/laxer3a

Can anyone point me to the Krikz test bios/cart? I have the MSU looping working now, but I'd like to do a more extensive test to see if it passes https://github.com/krikzz/MEGA-PRO/tree/master/mcd-verificator There's also an issue open about it failing, although not much detail/discussion yet: http...

I don't see this behavior in my setup. Do you have the "recents" feature enabled? That code seems to check whether files still exist whenever updating the list, and if the file in question is within a zip file, checking for the file's existence requires at least reading the zip index, not just a sta...

One thing to keep in mind is that modern FPGAs are not just a bunch of logic; they also have dedicated "hard blocks" for specific functions that would be especially inefficient or incur a major performance penalty if implemented in generic logic. Examples of these include blocks for RAM, MAC (multip...

With a 16kb FIFO for data, another FIFO for the Audio, all the special chips cannot fit. So, I have to try something else instead... I'm admittedly not an FPGA resource expert, but after looking around for some optimization possibilities I don't understand why this would be the case. I found a coup...

I've been looking into this, but it's not trivial. Disk II exposes a lot of the underlying drive behavior to Apple II software; the CPU essentially performs the role of the controller. I have two-drive read support semi-working, but there are still a couple of quirks around mounting/unmounting that ...

Yes, the default/official romsets.xml file is only ~23.5KB. Darksoft sets don't require a list of file names because they all use the same names, which the loader uses as defaults.

Seeing 000-lo.lo but no "C" ROM suggests that the loader isn't finding the game ROM files it expects. Are these emulator sets? By default (i.e. without a custom romsets.xml file), the MiSTer Neo Geo core mostly supports Darksoft-formatted sets. These contain pre-concatenated/interleaved/decrypted RO...

Galaxian sound accuracy is apparently still an open question at this point, partly because it's not clear that all boards actually used the same component values. There's a lot of analog stuff in the sound hardware that might have been fudged with "close enough" resistors/capacitors in some producti...

The problem isn't with a specific number or word choice, it's that the comparison is meaningless because I/O pin count is a system-level integration issue. The aoR3000 CPU core itself has no I/O pin requirement. The resource report shown is for a specific demo system design on a DE2-115 board. The c...

It really depends on what expectations you're trying to support for "a GPU'. Something that does basic blitting of optionally scaled/rotated/distorted rectangles is certainly reasonable. I think a developer would be doing pretty well to get, say, a Voodoo2 level of features and performance on MiSTer...

Would a DE-10 Saturn implementation run 2D games only if say you removed one of the dual video chips from the design? Let's make the Saturn as it was originally intended to be! Not really. To the extent that one of the VDPs can be construed as "the 2D one", it's VDP2, which basically handles backgr...

Turbo doesn't change the clock speed, it bypasses CPU bus arbitration for sprite DMA. Both of these approaches have the effect of running more CPU instructions per second, but the underlying mechanisms are pretty different.

Redirection seems to work. For example, stick the following in a file (e.g. c:\initspk.dbg):
and then run debug like this:

I suspect that this might actually be a bug in Ultima V that was masked by typical BIOSes of the day. Early PCs would always beep at startup, 1 beep to indicate a successful POST. Ultima V might inadvertently rely on timer channel 2 having been initialized by that BIOS subroutine. I'm not 100% sure,...

Yeah, and I think the bottom line is that there's plenty of FPGA hardware out there capable of a KI core; we're just not likely to get that hardware for the price of a DE-10 Nano in the foreseeable future. We don't necessarily need a revolutionary new product category, we just need the next iteratio...

The main trick seems to be making sure that the CPU actually has access to something during the extra cycles. At the very least, I think it's currently necessary to assert cpuHasBus during (Maybe one 32 MHz clock cycle before? I'm not very familiar with the VHDL update semantics) a CPU cycle. It's p...

Here's a (probably not very "Pythonic") Python script that will add the signature in question. Honestly, though, the thing you're likely to run into with games of this vintage is that many of them really don't run properly on anything other than an early PC/clone, at least not without additional too...

I don't especially have direct experience with booter games, but researching this has led to believe that a lot of the disk images floating around online are associated with a utility program called "Flopper" that somehow loads them from DOS, and thus aren't necessarily actually bootable disk images...

This isn't even getting to the GPU, which is the hard part for the N64 anyways I believe. As far as I can tell, Killer Instinct hardware doesn't really have a GPU. At least, I don't see anything on the board that looks like it could realistically be a GPU, and the only clearly graphics-related regi...

I think the CPU core runs at 100 MHz, with the system bus running at 50 MHz. I don't think that's necessarily a showstopper (people have done conventionally-pipelined 100+ MHz CPUs in a Cyclone V fabric), but it definitely puts it at the more difficult end of things. However, unless I'm missing some...

Haunted Castle is actually listed in the jtcontra readme as using the same graphics chip. The CPU is basically a 6909 with non-standard opcode assignments and a few custom instructions. So it definitely requires more work than a 6809-based game, but it should be reasonable to modify the existing 680...

I think its a shame no one has been working on arcade cores for any of the Gradius arcade games, Lifeforce / Salamander, R-Type, or Image Fight. I did a first pass at Gradius a while ago, but sort of burned myself out on it trying to understand how the graphics rendering is actually supposed to wor...