MiSTer FPGA Forum

https://github.com/MiSTer-devel/Apple-II_MiSTer More generally, to find a particular MiSTer core see the sidebar of the Main_MiSTer wiki . Documentation for the core itself is in the README file on GitHub. If you mean documentation about the Apple II, there's a lot out there. I'm far from an Apple II expert, but the most detailed and comprehensive ...

If this chip is arm, could it be possible to directly emulate it with the arm processors in the cyclone V ? That's an appealing idea with a kernel of justification. Unfortunately, it's probably wishful thinking in practice. ARM isn't so much a single standard as it is a family of standards and cores. On the Cyclone V SoC side we have an "appl...

Sony just released an official linux driver, but no adaptive/haptic support yet. https://www.playstationlifestyle.net/2020/12/24/dualsense-official-linux-driver/ Yeah; I don't expect support for the haptic trigger stuff in particular because that feature is a genuine innovation; there's no reason for generic API/ABI definitions to even exist for t...

Anyone have any thoughts on network drive implementations? I played around with Microsoft's "Network Client 3.0" about a million years ago in hopes that it would be able to run games from a suitably neutered Samba share, but found that it took too much conventional memory to run most software. If memory serves, even EDIT couldn't run afte...

I see it the same way. It's equivalent to any special chip enhancement such as SA-1 etc. Just because it came out after the SNES' production lifespan doesn't make it any different. That's true as far as it goes. What makes MSU-1 different is that it's demanding on the hardware in ways that chips designed for real-world early-'90s mass production a...

Has anyone tried a DualSense controller with MiSTer? It's getting pretty good overall reviews and I'm considering picking one up to replace my SN30 Pro+ (my second 8BitDo pad in a row to develop a silicone problem).

8BitDo Bluetooth controllers have various modes for different hosts, and I don't think they all work with MiSTer. Judging by the MAC prefix, your controller is probably in Nintendo Switch mode. For most of the recent controllers, the mode is set by holding one of the X/Y/B/A buttons while powering on the controller with the Start button: Y: Nintend...

I don't think the latest release had any changes that would affect Chrono Trigger. What version(s) of the ROM do you see this problem with? Are you using any patches or cheats?

MiSTerEggman wrote: ↑Wed Sep 16, 2020 7:51 pm can send voltage back, even with the MiSTer off?

Yes. Certain types of electric motor and electric generator are essentially the same structure, just optimized for different purposes. Apply voltage to the terminals and it produces rotation on the rotor; apply rotation to the rotor and it produces voltage on the terminals.

Did I hear correctly that these boards are famous for having loads of custom chips? My memory of this is fuzzy, but I recall that late '80s/early '90s Konami hardware is regarded as noteworthy because they had a library of custom chips that were very flexible and could be combined in various ways to suit the needs of different games. Wire two tile...

I was trying to understand installing things to HDD on X68000, but I ran into a problem because I don't think there's any way to type the yen symbol, which is the directory separator in Human68K, on my US keyboard. The obvious thing would be to use the backslash key (since the character code is the same; this is presumably why it became the directo...

Yes, that's almost certainly what you're seeing. Most cores require the SDRAM board, and if it's not present they'll mostly just fail in various ways (there are technical reasons that it's difficult to show a proper error message for this situation). SDRAM is optional for Genesis, TurboGrafx-16, GBA, and a few arcade cores.

This is kind of a long shot, but I'd check the DIP switches and make sure that they're firmly flipped to the default setting (see page 11 in the DE-10 Nano User Manual). If one of them isn't making good contact, the FPGA might be trying to load a bitstream from the wrong place.

The problems allegedly start with the game's music engine losing resolution when it mixes samples. If this is true, I don't think a filter on the output can really fix it; that's basically the audio equivalent of the "zoom and enhance" trope. I'd guess that really fixing it would involve altering the game to mix at a higher quality and th...

Well I'm glad you're making progress in getting something working. When I said I assume the Cx4 doesn't need to be involved I wasn't aware how much of memory mapping the Cx4 is in charge of. I was thinking if the SRAM area used by the hack is not causing the Cx4 to control the bus then it'd be simple to map SRAM there. But if it does then you'd ha...

If you can find the bits that map your normal LoROM cartridge SRAM and add that to Cx4's setup/init the hack might be happy with that. As I indicated in my previous post, this approach doesn't work as stated. However, one thing that did get saves working was to simply edit the HDL to replace the CX4's BSRAM connections with the ones from the stand...

Are you talking about the Cx4's internal ram? It occurred to me that the SNES_MiSTer BSRAM block might have been co-opted as CX4 "internal" RAM, but I don't think that's the case. I didn't really account for the "Program RAM" described in CX4 documentation, but that's apparently too big to fit in the SNES_MiSTer BSRAM block any...

I don't really understand the details of the mapping, but it looks like the basic problem is that SRAM is only activated when CX4 reads or writes the SRAM space, not when the CPU does. However, fixing that in the straightforward way causes some obviously wrong junk to be written to SRAM. In principle I could keep digging with SignalTap, but as a pr...

Navigating this stuff can be a little tedious, and does take some practice. I assume some kind of smart editor support with a "find usages" function exists somewhere, but I've never personally seen one that actually works (let alone across Verilog and VHDL), so I just use grep and the search function in my text editor. Maybe that feature ...

The SDRAM address bus is too few bits because it's multiplexed into row and column addresses, as is conventional for DRAM in general. The conventional idea is that you put the row address on the bus, strobe /RAS, wait some specified amount of time, put the column address on the bus, strobe /CAS, then wait for some more time before the data is valid...

There are such bytes, but I don't see any obvious problem in how they're interpreted by MiSTer. However, each special chip cartridge type also has its own logic in SNES_MiSTer to handle mapping, so there could be an incompatibility specific to the combination of CX4 and SRAM. The CX4 code definitely has logic and connections for SRAM, but I'm not f...

I'll consider the mini-itx size first as we could easily fit in some really nice case like this one : PHNXTOEM One thing I'm not sure about for Mini-ITX is the I/O shield. Standard Mini-ITX cases take the same I/O shield size as ATX, but I think the linked case is Thin Mini-ITX which uses a 25 mm tall shield. I know there are some SuperMicro I/O s...

I'm not an expert on the MiSTer framework either, so take this with a grain of salt, but it looks to me like: 1) The status port was already expanded to 64 bits, it's just that only 32 of them are directly accessible through the configuration string. 2) There's a mechanism for custom handling of an option entry (using core-specific code in Main_MiS...

Vampire V4 uses the same family (Cyclone V), but I doubt it's the same chip. I didn't see any references to the exact part, but one preorder page says 77K LEs, which is smaller than MiSTer's fabric and is a size only available in the non-SoC parts (i.e. parts without the integrated ARM system that runs Linux and the main MiSTer program).

As far as I know, 130 MHz is considered the baseline for an acceptable board (due to the Archie core running SDRAM at 126 MHz), and the more reputable sellers test at 140 just for some extra margin.

Maybe the Pb signal is shorted to ground in the cable? I don't have any specific experience with such a failure, but it seems plausible from some napkin algebra:

Are you using ROM files from Amiga Forever? Those won't load unless the rom.key file is in the same directory.

It's been a long time since I've seen the relevant math, but as far as I know the delay imposed by the board and connectors is relatively constant in this frequency range. So with 133 MHz chips I would not expect it to be stable at much more than 110 MHz.

I can't post a link here as nefarious scumbags who do not legitimately own every single piece of software used would be inclined to download it illegally ;) not sure, as microsoft itself published the vhd on archive.org I don't think Microsoft would do that. The details seem to be lost in the mists of the pre-2005 web, but as far as I know Microso...

Part of the reason a lot of these aren't available is that they use obscure (at least by retrogaming/retrocomputing standards) processor families, so it's a lot of effort for one or two platforms per family, most of which have few games at all and even fewer good games: Microvision: Intel 8021 and Texas Instruments TMS1100 (the processor is actuall...