Anyone working on the 1750 (-ish) REU?

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zBeeble
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Anyone working on the 1750 (-ish) REU?

Unread post by zBeeble »

So... I have some bigger things I want to do. Not really related to the C=64, but related to FPGAs in general. To that end, I want to bite off something "doable" ... so I would like to know if anyone is working on an REU here.

It seems very doable. It seems like it should be straight forward. I'm sure it wont, but I don't want to step on anyone's toes.
dshadoff
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Re: Anyone working on the 1750 (-ish) REU?

Unread post by dshadoff »

Maybe you could explain what you mean when you say "REU"... it's not a TLA I'm familiar with.
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zBeeble
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Re: Anyone working on the 1750 (-ish) REU?

Unread post by zBeeble »

Google? or Duck-duck-go?

Ram Expansion Unit. Also 1750 ... the model # from Commodore.

Which is really a misnomer, IMHO... C='s 17xx REU's were more like a DMA expansion. Here's what they do:
1) contain RAM (64k to 512k ... hackable to 2M).
2) contain a controller that will DMA 1 byte per cycle in or out of the 64/128 machine.

In addition to being hella useful for things like GEOS and/or Turbo Macro 64, it strikes me that it could have ushered in a new series of side-scrollers on the 64.

At full bore, in assembly, in tight crafted coding, the 6510 in the C=64 can, at best, write to RAM in on of 4 cycles. I'm not staring at the assembly here --- I'm just going by the statement in one of the REU description pages that the CPU could move memory at only 25% efficiency of cycles vs. the REU's _every cycle_ operation.
tomxp411
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Re: Anyone working on the 1750 (-ish) REU?

Unread post by tomxp411 »

The 1541 Ultimate, Ultimate 64, and Turbo Chameleon have 1750 implementations. I am not sure if the FPGA code in the Ultimate is open source (at least some of the code is on GitHub.)

If someone was looking to port Gideon's 1750 code to MiSTer, this might be a place to start:

https://github.com/GideonZ/1541ultimate

There's a file named REU in the fpga/cart_slot/vhdl_source directory.
dentnz
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Joined: Sun May 24, 2020 10:28 pm

Re: Anyone working on the 1750 (-ish) REU?

Unread post by dentnz »

The issue will be around how the RAM itself will be implemented. If we had enough FPGA space, then it would be pretty straight forward. The obvious alternative is to use the SDRAM instead, but the complexity is a bit higher and I am not sure about the latency of reads and writes.
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