Help reading IDE Verilog

[Bas]

As mentioned in a previous thread, I'm creating some software to interact with the AO486 core. Now I've been trying to make sense of the IDE controller implementation (presumably in ide.v) but Verilog HDL is simply too different from computer programming languages that I'm used to and I'm stuck. Could someone who's more up to speed on Verilog maybe have a look at the core and deduce what this core's logic is for determining Cylinders/Heads/Sectors values for the disk images we feed it? Or if I'm asking for a huge effort here (I honestly don't know), maybe point me to a resource that would teach me just enough about Verilog to be able to read it and do this myself?

[jca]

I am not sure you need to do that: the IDE controller has to look like a real IDE controller on the software side.

[robinsonb5]

Could someone who's more up to speed on Verilog maybe have a look at the core and deduce what this core's logic is for determining Cylinders/Heads/Sectors values for the disk images we feed it?

I think the logic you're looking for is probably in the ARM software rather than in the core itself. (That's certainly how it works on MiST - I'd expect MiSTer to use broadly the same approach, though I'm not 100% certain.)

[Bas]

My problem is to bridge the gap between the disk image file on the SD-card, which is just a long linear sequence of bytes in a Linux filesystem, and the way that ocean of bytes gets represented as a properly laid-out IDE drive to the simulated PC's BIOS. I already checked the included Bochs BIOS, but that talks to the "hardware" for its information so that's now my next step. Since there is no actual hardware, I'd guess the blob-of-bytes-to-IDE magic is in the Verilog.. but I may of course be wrong. This is all very much a learning as I go project for me.

I could take a shot at the source code of Bochs because that's in a language I can read, but the underlying assumption that AO486 and Bochs have identical IDE implementations feels like a bit of a long shot.

@robinsonb5 what software is there running on the ARM side for this core? If that's a Linux binary that has source available, I can go look there.

[zakk4223]

All that stuff is done in Main_Mister. Look in support/x86/x86.cpp

[Bas]

Right, thanks!

[zakk4223]

Actually I lied. It's most in ide.cpp these days.

It's not actually complicated, x86.cpp uses defaults. 16 heads, 256 sectors per track, (file_size / (heads * spt * 512)) cylinders

[Bas]

Thanks for that! I was following the breadcrumbs in there but it's good to have some confirmation. This I can use, so I'm going to write some code and experiment further. I wouldn't for the life of me have figured to look in Main_Mister, gotta love this forum!

[Solskogen]

256 sectors per track? I haven't looked at the source, but shouldn't it rather be 255?

[Bas]

It's stored as a single byte, so that holds 256 possible values. Counting them starts from 0, so the largest decimal value would be 255. It's fun juggling bits!