32-bit cores

xohs
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Re: 32-bit cores

Unread post by xohs »

I have an archive of most versions of SunOS, Solaris, NeXTStep, and OpenStep if you need them for testing.
xolod79
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Re: 32-bit cores

Unread post by xolod79 »

Sorgelig wrote: Fri Jul 03, 2020 10:52 pm
xolod79 wrote: Fri Jul 03, 2020 10:32 pm
And all 680x0 core dosen't have MMU. that does not run unix on them!
MMU present since 68030 (not EC or LC).
I wanted to say that. I am not aware of more than one open source MMU implementation for 680x0.

There is also an interesting proposal to implement a virtual ethernet adapter using a TAP device. what will require adding to the Mister framework a service for transferring ethernet packets between fpga and HPS (probably through shared memory?). just like it was done with sound cards. This solution will allow it to be used for other cores Minimig, Ao486 and others. I know that this is obvious to many, do not scold me.
rolopolo
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Re: 32-bit cores

Unread post by rolopolo »

I do have a spare station 10 which I think I a had dd image of running Nextstep. Dunno if that would help anyone. The Risc NS OS install images about are all DD images, no passwords on those. The SS10 is not a NS machine at the mo as it has an unsupported processor card inside right now.
bigvalen
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Re: 32-bit cores

Unread post by bigvalen »

I giggled like a child, when I brought up SunView....brought back old memories.

How hard would it be, to get networking going ? Is this a problem that'd impact most projects ?
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Grabulosaure
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Re: 32-bit cores

Unread post by Grabulosaure »

@bigvalen

Some cores support networking though serial port (PPP...) : Amiga, AO486. The SparcStation core also has an internal serial port accessible from Linux side, it can be used for the console and hardware debugger ("debug" ARM executable), it could be used for networking.

Networking worked on the old Xilinx dev board with had an MII PHY. A RMII PHY requires 7-8 signal pins.
cb88
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Re: 32-bit cores

Unread post by cb88 »

So here's a thought... Sparcstations could have up to 512MB ram on the SS20 (or 7x64MB + 8MB VSIMM to enable onboard graphics), there was also an nvsimm slot which could take another ram card out of the picture to provide nonvolatile memory to accelerate NFS etc... , (1GB on the Hyperstation 30), I was reading that nobody had an excuse for more than 128MB on a mister... well how about now! If two ram boards were used, that would double the available bandwidth also. I also wonder if with some concessions you could get 256MB on each board, I doubt the SS core, needs the ram to run at maximum clocks. A sparcstation 20 can *definitely* use that much ram... when heavily loaded with compiling stuff.

I like the idea of implementing a standarized ethernet card, with software support on the ARM CPU side since then any Linux supported network adapter can be used. But just wring up a Microchip ethernet chip is generic across what temlib supports outside of Mister.
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Re: 32-bit cores

Unread post by pacoarcade »

OpenBSD/sparc could be a nice candidate for testing the core. The last release supporting this architecture is 5.9 (ftp).
- Digital I/O Board v2.1 + USB HUB v2.1 + SDRAM v2.4 128MB.
- Neptune Blue case.
- Topping E30 DAC.
cb88
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Re: 32-bit cores

Unread post by cb88 »

OpenBSD as you mention is no longer updated, even though I found it a bit more ergonomic. NetBSD, acutally gets updates on sparc, and has better hardware support in general, so as hardware is added to the sparcstation FPGA image, NetBSD is your best bet. You can use the pkgin package manager to get a better experience than attempting to build software yourself.

Also sadly Linux dropped support for 32bit sparc the other day ... perhaps it can be revived but for the time being that is dead. If anyone wants to contribute to get Linux support back going I suppose you could try but I don't think it would be super welcome I think they are tired of supporting it, of course it could be support outside of mainline not much of a big deal.
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Grabulosaure
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Re: 32-bit cores

Unread post by Grabulosaure »

cb88 wrote: Sat Dec 19, 2020 6:41 am So here's a thought... Sparcstations could have up to 512MB ram on the SS20 (or 7x64MB + 8MB VSIMM to enable onboard graphics), there was also an nvsimm slot which could take another ram card out of the picture to provide nonvolatile memory to accelerate NFS etc... , (1GB on the Hyperstation 30), I was reading that nobody had an excuse for more than 128MB on a mister... well how about now! If two ram boards were used, that would double the available bandwidth also. I also wonder if with some concessions you could get 256MB on each board, I doubt the SS core, needs the ram to run at maximum clocks. A sparcstation 20 can *definitely* use that much ram... when heavily loaded with compiling stuff.

I like the idea of implementing a standarized ethernet card, with software support on the ARM CPU side since then any Linux supported network adapter can be used. But just wring up a Microchip ethernet chip is generic across what temlib supports outside of Mister.
The DE10nano has 1GB of DDR3.
512MB is used by the ARM core and Linux, 24MB is used by the scaler, a few MB is used by audio buffers.

So the rest can be used by the cores : The SS20 uses 484MB for RAM and a few extra megabytes for video framebuffer and boot ROM.
It could be possible to get a few extra MB from DDR3 and use the SDRAM daughterboard (but it has lower bandwidth than DDR3).
But 484MB is already far, far better than the 128MB available on the old Xilinx SP605.

Ethernet is really needed for a full SparcStation "experience".
cb88
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Re: 32-bit cores

Unread post by cb88 »

Yes I know but the SDRAM has lower latency than the ARM memory which has to make a few more hops...still it may not matter too much if there is at least some cache implemented in the core.

Yes the mister board is quite good, I just ordered one. My only point about the ethernet was, if the mister side of things implements a fake ethernet in software, with a hardware interface exposed to the core it may be quite nice to use that since you could keep the networking wireless.
xolod79
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Re: 32-bit cores

Unread post by xolod79 »

@Grabulosaure
Hello!
Have news about your SPARC core?
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