CPS 1.5

[flynnsbit]

ao486 doesn't use SDRAM.

[silentheaven83]

Thank you guys.

I hope in the future none of the developers will need and put a new module requirement so that anyone who already bought it is safe.

Is this “limitation” part of the design of the board or is it caused by the capacitors choice from the sellers?

[dshadoff]

A variety of factors.
The SDRAM chips themselves are capable of more.
But the GPIO pins on the DE10-Nano are being pushed; the capacitors are there to try to make up for that, but it's not simple.

When reaching these frequencies, a lot of care needs to be taken in:
- power management
- specific trace sizes and lengths being used
- impedance matching
- capacitive decoupling
...and so on and so on.

This wasn't a product developed in a lab over the course of years by a big team of people on a well-funded project with a single over-arching predefined goal to reach, like a 'normal' commercial product.
It started as a hobby project, and the goals keep getting more and more grandiose as time goes by, and other developers join.

At some point, the goals will likely exceed the original design which were built to suit the goals of an earlier time... just like the furniture you get when you're in your twenties is not likely going to be the same furniture you have when you're in your 40s.

But sure, it'd be nice to keep within the limits of existing hardware until it is no longer possible.

[silentheaven83]

Thanks again for your explanation.

My only doubt is if the problem is also originated by vendors using “not so good” caps since jotego also wrote to check that.

[dshadoff]

Lots of factors can affect performance. Leaving traces of flux on the board is probably a bigger cause.
I think Jotego used the phrase "made by hand", but it's more specific than that - flux, and the failure to clean it, can cause issues.

Similarly, hand-soldering improperly (i.e. applying wrong heat for wrong period of time) can damage capacitors. Some cheaper types of capacitors may have bad QA and fail tolerances, but more likely, success would have to do with the number, value, and placement of the capacitors.

[WolfgangBlack]

Why all these wild explanations when in fact all other cores worked with the Winbond chips?
There was a problem between the code and the Winbond chips that are now fixed.
Caps, flux, and global warming have nothing to do with it.

[dshadoff]

I think you've missed a critical component of the explanation.
It's the SDRAM controller that overdrove the modules - the newly-written SDRAM controller which is specific to Jotego's cores.
You'll notice the other cores don't have problems.

When people ask "how is it overdriving the modules when the chips are rated for higher speed ?", there is nuance. Of course, not everybody likes to know nuance... and you're free to ignore it.

But don't say it's bad chips; that explanation shows a profound misunderstanding of what's going on.

[bazza_12]

just like the furniture you get when you're in your twenties is not likely going to be the same furniture you have when you're in your 40s.

haha I've still got the same furniture from my 20's!

[suverman]

Caps, flux, and global warming have nothing to do with it.

Very arrogant of you when the dev has publicly mentioned its the caps that is causing the issue.

[silentheaven83]

I think you've missed a critical component of the explanation.
It's the SDRAM controller that overdrove the modules - the newly-written SDRAM controller which is specific to Jotego's cores.
You'll notice the other cores don't have problems.

But don't say it's bad chips; that explanation shows a profound misunderstanding of what's going on.

That is the answer I needed, because there is a difference for people like me that cannot understand those things ( ) between a bad chips/capacitors/board that need to be fixed/bought again and a SDRAM controller that overdrove the modules.

If there was the first case it would be strange that all other cores showed no errors/glitch.

Anyway I got "ADDRESS ERROR" on Street Fighter Zero CPS1.5 too at the start of the first round on a v2.5 128MB.

[dshadoff]

Based on Jotego's twitter feed, it looks like he will adjust the access method to reduce the burden on the modules.

It seems that he was trying to get maximum speed out of the SDRAM (which isn't necessary for any games so far).
Improving the boards is also a possibility - but that would take a time investment from somebody as well (for example, an EE who specializes in power supply work).

[jca]

Why all these wild explanations when in fact all other cores worked with the Winbond chips?
There was a problem between the code and the Winbond chips that are now fixed.
Caps, flux, and global warming have nothing to do with it.

Jotego explained on his twiter what is the problem: the 32MB chips used a different "connection" to the GPIO compared to the 128MB chips which allow for a much better throughput :
MiSTer 128MB vs 64/32MB modules.
Random read test at 96MHz:
128 module: 71MB/s
64/32 module: 126MB/s

With his new memory controller he is pushing the 128MB modules to their limits and yes the caps, the flux, .. can have an effect. This does not mean that vendors put "no so good" caps on their modules as there was no problem before.
Note: I have the 32MB Winbond memory, before changing his memory controller I had sprite corruption in Tiger Road and Bio Commando. With the new memory controller the problem disappeared and I also have no problem with the CPS 1.5 cores.
Only some users with 128MB modules have problem and no user with 32/64MB modules have problems.
And no, these problems have nothing to do with global warming.

Errata: It seems that what I wanted to say says the opposite.
the 32MB chips used a different "connection" to the GPIO compared to the 128MB chips and this difference allows the 32MB chip to attain a much better throughput

[FatSlob71]

Global Cooling Effect More Likely.... MM 2.5 only issue is SNSmasters after stage 1 completion illegal address error!

[aberu]

Caps, flux, and global warming have nothing to do with it.

Very arrogant of you when the dev has publicly mentioned its the caps that is causing the issue.

To be fair to the "arrogant person" (not meant to be scare-quotes, just keeping in context...), from my understanding it's a combination of the caps+hardware assembly (totally normal and expected part to part variance in caps, solder, flux, technique, and not necessarily the design), the hardware design and BOM of the SDRAM module maybe needing to be adjusted, along with Jotego not using the "intended" (as designed by sorg) limits set by the template+framework of the MiSTer project (which means Jotego is pushing the hardware for the 128MB module to it's limits). Jotego isn't constrained by these limits due to his cores being unofficial by choice. He's figuring out ways around this though, and it's awesome! Jotego did admit in the interview however that it was probably his biased opinion, and I'm sure he would not be so absolute either way in assigning blame when asked about it more seriously. His recent tweet is probably being slightly misunderstood in its intent. His SDRAM modules may have better than average capacitors, and he didn't notice the problem in testing as a result.

Whether or not this is the fault of the hardware sellers, the hardware design, or jotego's core design deviating from the standard is a chicken/egg problem essentially.

To be fair in criticizing the "arrogant" person, caps and flux absolutely do have something to do with it, however it's more complex than this, see above.

To be seemingly unfair to the "arrogant" person, them trying to forcibly insert some weird discussion around global warming is a really inappropriate and potentially toxic thing to do. I'd be happy to have a PM debate with WolfgangBlack to change their mind on what I perceive to be their misunderstanding on that scientific and political issue, but this isn't the forum for that.

[FatSlob71]

Why?

[pgimeno]

Could it be the case of more demanding cores like ao486 or PS1 ones?

Every time I see someone mention PS1 on MiSTer, I get that shining in my eyes...

[jca]

It looks like Jotego found a solution:
https://twitter.com/topapate/status/1341108730713288706

[silentheaven83]

It looks like an hardware mod solution.

In the thread of the same tweet someone says that the capacitor jotego added should already be there by v2.4/2.5 design.

[dshadoff]

That someone was me.
The implication of the tweet was that there wasn't a 10uF capacitor in that position on the board.... but the picture doesn't tell us the whole story.

[silentheaven83]

I’m a little worried because I don’t know how to do that mod and that would mean to send the board back to misterfpga.co.uk to get it done if it becomes a necessary modification.

And from Italy it isn’t an easy and cheap task to do.

[aberu]

The alternative could be for people to use Japanese capacitors with lower ripple as opposed to doing this mod. The RAM builders could spend the extra 50-200 cents per board or so and raise prices slightly to maintain margins. That is, if they are using the cheaper Kemet caps that Sorg calls for, instead of higher quality ones.

[pacoarcade]

10μF ceramic capacitors are bigger in size than 0.1μF (at least the ones I have) so you can visually check if they are placed correctly. Since SDRAM schematic lists 1μF maybe your SDRAM has them instead of the recommended ones in the SDRAM assembly guide?

top row: 10uf, 0.1uf, 10uf, 0.1uf
bottom row: 10uf, 1uf, 1uf, 10uf, 10uf, 1uf, 1uf, 10uf

My 10uF capacitors are murata brand.

[dshadoff]

Kemet's not bad, although I would go for Taiyo-Yuden or Samsung... I use X7R, and always aim for the highest voltage rating and lowest tolerance I can in the package size... If you study capacitors, you'll know that there are a lot of factors which affect their usefulness in a given circuit. Not just an individual part - but the placement, adjacent capacitors, trace widths and thicknesses... etc. etc. etc.

But later, Jotego posted that he needed to supplement the existing capacitor (not just add or replace one). Makes sense, if the charge is getting depleted.

It's very possible that his controller is driving the overall design outside of tolerances, where individual parts variations may start to come into play (i.e. some will still work, but others may not). In such a scenario, it would make logical sense that beefing up the decoupling would bring it back closer to tolerance and improve reliability.

[OriginalXOR]

Would be great to see another Memory Tester publicly released with new Speed Displays, so the non-hardware people can test their setups.
I'm sure my memory is as good as it can be (128mb) but at speed who knows, I've had the odd memory-glitch: although recovered with reboots, and I'd rather be able to test before asking questions to the person why provided my memory.

[dshadoff]

Sure, that is something I asked Jotego to work on - the existing memory tester uses Sorgelig's SDRAM controller, which works in a well-known manner, and tests that type of access.

Jotego's SDRAM memory controller accesses the memory in a different way, and would have different behaviours based on the different access patterns. So, a new memory tester based on that controller would make total sense.

[WolfgangBlack]

[WolfgangBlack]

There's dozens of arcade cores that have worked fine without a lick of sprite corruption and the problem
with his cores was fixed through software so it's absurd to blame caps and flux for the issue.
Though I do suspect sea level rise due to global warming might be partly responsible.

[dshadoff]

It hasn't been fixed yet. He's still looking at all the variations of behaviour.
And... he's the one blaming caps.

[jca]

There is a lot of misinformation in this thread.
There is no such thing as capacitor ripple, may be ESR would be the correct term.
10uF ceramic capacitors won't make the cut, you need electrolytic (which is what Jotego used for his test as it is quicker to install) or better tantalum.
The software fix is due to the fact that Jotego managed to decrease the frequency from 96MHz to 48MHz while maintaining excellent throughput, he is a magician. But at 96MHz the problem with caps, ... is still here. And no, sea level rise due to global warming as nothing to do with it. I wish you would spot spewing garbage, visibly you don't know anything about electronics. There is nothing wrong about not knowing anything about electronics but I wish you would listen to people who know. I know enough to understand what is happening but there are others on this forum who have much better understanding than me.

[dshadoff]

Who are you addressing ?