I've found a way to overclock the MPU subsystem (the Cortex-A9 CPU cores) in the DE10 Nano, and I've written a kernel driver to help facilitate it. You can try it out here.
Why overclock the CPU?
Overclocking should help with hybrid emulation efforts on the ao486 and Amiga cores
Slightly reduce game loading times on some cores
Will help with anything else CPU-bound - your imagination is the limit. I've heard of possible improvements to MIDI stuff
Underclocking to 400 MHz saves an estimated 140 mW (measured on MiSTer main menu) and doesn't affect many core's performance
What will this NOT help with?
This driver adds the ability to overclock the MPU subsystem - the part of the Cyclone V SOC that runs Linux. It will not make any FPGA core run faster unless you are doing hybrid emulation.
Risks: READ BEFORE INSTALLING
This driver is in beta. I don't believe it should harm your DE10 Nano if you have good cooling, as all in all it's a very small increase in wattage and heat is manageable on other Cortex-A9 devices at these frequencies manufactured at a similar process node. These are very low power CPUs designed for phones. Increasing the input voltage is generally a riskier factor than frequency, and this driver never touches it - it's fixed at 1.1V on the DE10 Nano.
To be on the safe side, I'm going to say that ACTIVE COOLING or VERY GOOD passive cooling is REQUIRED. I've only tried this with active cooling.
Proceed at your own risk - as a GPLv2-licensed software, the kernel and driver come with NO WARRANTY.
Fully featured CPUfreq driver for DE10 Nano
Initially: 1.2 GHz, 1 GHz overclock options; 400 MHz underclock option
Control overclock with scripts from userspace
Driver keeps CPU frequency at stock until a script is run
1200 MHz uses only approximately 160 mW more than stock on MiSTer main menu (results will vary depending on your setup)
Optional dynamic frequency scaling based on system load*
*Currently, this will rarely keep the CPU below the max clock speed you set because the MiSTer process keeps one core at 100% load, so I haven't included scripts to configure this.
Step 1: Install kernel
This step won't be necessary in the future, as the change has been merged into the main branch.
- Download zImage_dtb from the Releases page of my kernel fork
- Backup your old zImage_dtb in /media/fat/linux directory! If your system doesn't boot, revert to your backup.
- Replace the old zImage_dtb on your /media/fat/linux with the new one
- Reboot the system if you did it live, or pop the SD card back into the system and boot it
Step 2: Run overclock scripts
Copy all the scripts to the Scripts directory on your SD card: https://github.com/coolbho3k/MiSTer-Overclock-Scripts
By default, the system boots up just at the stock frequency and is locked at 800 MHz. Run one of the scripts to overclock or underclock. The changes are not persistent. Rebooting your DE10 Nano resets any of your settings.
Run set_cpu_max_1200.sh to set max clock speed to 1.2 GHz (50% overclock)
Run set_cpu_max_1000.sh to set max clock speed to 1.0 GHz (25% overclock)
Run set_cpu_max_800.sh to set max clock speed to 800 MHz (stock)
Run set_cpu_max_400.sh to set max clock speed to 400MHz (half speed)
If the system crashes, your Cyclone V is not stable at the specified frequency. Just power cycle the board to reboot.
Incorporating into your kernel
Currently the changes are merged into the main MiSTer kernel.
This is my original development branch: https://github.com/coolbho3k/Linux-Kern ... /overclock
There may be a way to overclock the memory too. The memory chips on the DE10 Nano BOM are rated at DDR3-1066, while the DE10 Nano runs them at DDR3-800. I'm not sure if this will affect the FPGA side of things. If so, I'm also not sure if this would help alleviate the need for the SDRAM for some cores. It might be worth looking into.
Upstreaming to mainline Linux is a goal but will be a bigger challenge, as this driver is currently DE10 Nano-specific, and cannot be generalized to all Cyclone V SOC/Arria V SOC implementations without some more work. For example, it assumes that clock dividers have been set up in a certain way in u-boot and assumes and an input clock of 25 Mhz.