MiSTer updates and changelog

For MiSTer project updates only, developers releasing MiSTer cores can post updates here.
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Sorgelig
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Re: MiSTer updates and changelog

Unread post by Sorgelig »

ao486:
- Fix interrupt controller.
- sound: Updated the DSP write port status busy flag (user7182).
- remove the press-to-see need for joystick to prevent configuration issues in games (Kitrinx).
- Add option to disable joysticks.
- Support for steering wheel.
- Updated framework.
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Re: MiSTer updates and changelog

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PCXT:
- BIOS writable option
- Upgrade to UART 16750 (Sebastian Witt), thanks @kitune-san
- Improvement of the sound mixer, thank you @Mills and @somhi
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Re: MiSTer updates and changelog

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New Computer Core: EG2000 (aka Colour Genie)
- CAS tape loading via OSD (instructions in Readme)

MiSTer conversion by AlanSWX, CAS support by Flandango
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Re: MiSTer updates and changelog

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PCXT:
- Audio mixer based on that of ao486
- New BIOS loader based on SDRAM, by @kitune-san
- Fix 8288, by @kitune-san
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Re: MiSTer updates and changelog

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EG2000:
- Fixed tape loading audio OSD option, by @Flandango
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Re: MiSTer updates and changelog

Unread post by FPGAzumSpass »

PSX:

features:
- implement 3 different turbo speeds
- Move datacache into CPU -> speedup when using turbo setting "high"

fixes/changes:
- fixed memory card loading edge case leading to memory card data not being available
- fixed wrong savestate slot index when loading core
- fixed edge case where loading a savestate would hang up the core until reset is triggered
- fixed CPU blockLoadforward edge case (CPU test from pcsx-redux is now pass)
- many cleanups and resource reductions, FPGA logic went from 97% to 93%

accuracy improvements:
- Memory: CD register bus is now using extbus logic
- Memory: extbus timing modified when using PStrobe together with RecP(CD timings)
- Memory: adjust timings for BIOS reads
- Memory: rework sdram -> instruction cache interface, reducing cache fetch time by 1 cycle, fulfilling test against hardware
- CPU: implement out-of-order load pipelining
- CPU: implement readback of CACHECONTROL register
- CPU: make instruction fetch stage fully independent of data fetch stage
- DMA: add timing cost for ram page switch and refresh
- DMA: reduce initial overhead by 2 cycles
- Timer: implement non-retrigger mode by using Mode bit 6
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Re: MiSTer updates and changelog

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Atari 800, Atari 5200:
- Atari800: add Start,Select,Option,Reset buttons to joystick.
- Updated framework.
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Re: MiSTer updates and changelog

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EG2000:
- Added joystick support, by Flandango
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Re: MiSTer updates and changelog

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NES:
- Fix SMB2J black screen on level 4-4 end (paulb-nl).
- Updated framework.
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Re: MiSTer updates and changelog

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S32X:
- CPU fixes (srg320).
- Updated framework.
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Re: MiSTer updates and changelog

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Arcade Core: PenguinKunWars
- port to MiSTer by MiSTer-X
- Updated SYS to latest
Did I do something useful?

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