If you desired that's the interactive bill of materials BOM of the ATLAS MINI.
The object was to get as much pins free, and use bus standards, like the 2x20 Rasberry Pi GPIO.
The are some similarities with the cyclone III used in the MIST, the CYC1000 has the same 66 9Kbits blocks, and the same amount of KLES 25KLes.
The key point is that cyclone 10 LP is most a Cyclone IV with the drawn current limited in their pins, the PLLs are the same between Cyclone IV & Cyclone 10 LP, only improves a bit further over the ones in the Cyclone III family.
Nowadays there are used more than three ways of video to see the cores, composite, vga222, scart232 and DIGITAL-VIDEO with or without sound.
Also some developers used I2S boards conected to the pins in the 2x20 bus.
The DIGITAL-VIDEO wrappers are direct, so no framebuffer or framescaller, that's force to move the board until you can reach a monitor that could see the DIGITAL-VIDEO signal, some times a monitor that has VGA as one of their posible inputs, those monitors should support further more resolutions an frequencies, to have such a monitor, capable of seeing a DVI signal is most related to a case of luck.
One key aspects in the future is that CYC1000 has another CLK input signal.
The platform is more focussed in learning HDL languages.
We have also a little group of people arround this microFPGA in Telegram.