MiSTer FPGA Forum

The Next186 modules are not handling CS, WR, etc. in an edge triggered way, but expects these signals as a single cycle pulse. If a CS & WR lasts for more cycles, it might have unwanted consequences (for example, the PIC acks all interrupts, not just the last one in service).

• Scancodes SET 2, temporarily.
• Automation of the boot0.rom file generation with a python script, from the bios and optionally ibm basic via minuszerodegrees.net download.

• CPU at 7.16Mhz
• IRQ0 disabled

module bios(
  input clka,
  input ena,
  input wea,
  input [15:0] addra,
  input [7:0] dina,
  output reg [7:0] douta
);

reg [7:0] bios[65535:0];

initial $readmemh("bios.hex", bios);

always @(posedge clka)
  if (ena)
		if (wea)
			bios[addra] <= dina;
		else
			douta <= bios[addra];

endmodule

spark2k06 wrote: ↑Thu May 12, 2022 6:12 pm It takes the same time at 4.77Mhz as it does at 7.16Mhz, how strange this is, I wonder how long this sequence of code will take in IBM BASIC on a real PCXT:

Chrono.jpg

EDIT : I've just made a quick test under 86box which is quite accurate and this loop takes also a little more than 11s so to me you're not far from the reality, anyway I'll confirm this tomorrow on hard.

spark2k06 wrote: ↑Thu May 12, 2022 7:19 pm

However, what I find strange is that I'm getting 11s at both 4.77Mhz and 7.16Mhz, it's throwing me off.

Agree, this is weird. I'll test at both frequencies, but I'm pretty sure that the time will be reduced

spark2k06 wrote: ↑Fri May 13, 2022 8:03 pm I've just found a mine for the goal of having a PCXT...

https://github.com/kitune-san/KFPC-XT

We'll have to dig deeper into all this and see how it all fits together with MCL86.

kathleen wrote: ↑Fri May 13, 2022 7:04 pm 1st try on my Tandy 1000. As you can see I set the speed to LOW which corresponds to 4.77Mhz. The output is CGA (on a LCD monitor thanks to the interface MCE2VGA (https://www.serdashop.com/MCE2VGA).
20220513_144832.jpg
Then I run the small basic program and.... it last 11 sec 31.
20220513_145958.jpg
Then I changed the setting to run the Tandy 1000 in fast mode (7.16 Mhz)
20220513_150111.jpg
end yes, I do confirm the duration is different, in this case : 9 sec 35. (A gain af almost 2 seconds from 4.77 Mhz to 7.16 Mhz)
20220513_150354.jpg
Then I did the same exercise with the µ8088XT equipped with a VGA card (I checked with a CGA/Hercule card and the results were equals)
20220513_154444.jpg
And with the setup, also running at 4.77 Mhz, the duration to complete the loop was : 10 sec 80
20220513_154801.jpg
BUT, I realized that this µ8088XT board was equipped with a 8087 coprocessor I do not know if this could have an impact on a lopp in Basic.
If needed I'll ask to get the 8087 removed and I'll repeat the test.
Hope this will help.

SavourySnaX wrote: ↑Sat May 14, 2022 12:28 pm The CPU core has been written from scratch (its based on the work of https://www.reenigne.org/blog/8086-micr ... assembled/) and thus its timings should be accurate to the original chip. Its not complete yet, but I`m making slow progress

8086 microcode disassembled

Recently I realised that, as part of his 8086 reverse-engineering series, Ken Shirriff had posted online a high resolution photograph of the 8086 die with the metal layer removed. This was something I have been looking for for some time, in order to extract and disassemble the 8086 microcode. I had previously found very high resolution photos of the die with the metal layer intact, but only half of the bits of the microcode ROM were readable. Ken also posted a high resolution photograph of the microcode ROM of the 8088, which is very similar but not identical. I was very curious to know what the differences were.

8088 Bus Interface 90%
8086 Bus Interface 0%
Microcode Translation 61%

pgimeno wrote: Is that ROM BASIC? If not, the results may not be comparable. I think GWBASIC's interpreter is somewhat different, and the timings for running from ROM may differ from those for running from RAM. In fact I wonder if the core has any wait states when reading from ROM that could explain the lack of differences; that's a very long shot though.

The 8087 should have no influence whatsoever.

pgimeno wrote: Sounds like the best option if you want a really, really accurate 8088 core. It's still WIP though.

kitune-san wrote: ↑Wed May 18, 2022 11:35 am Hi

Thank you for your interest in my repository. ツ

.io_channel_ready is commented out.
Please set "1'b1" if you unuse this signal.

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Sorry, I am not good at English.