MiSTer FPGA Forum

Posted: **Fri Jun 24, 2022 8:39 pm**

The NIOS soft processor sounds interesting. I am not sure if that would allow PCEM code to convert to FPGA with some massaging, but if so, that would be awesome, assuming the end result is cycle accurate reproduction of hardware in FPGA.

The NIOS could respond to the same ISA bus IO addresses as the disk controller and could bridge to the MiSTer SD flash on the IO board - all using software.

Posted: **Fri Jun 24, 2022 11:34 pm**

jca wrote: ↑Thu Jun 23, 2022 10:21 pm Thanks to all. While you were posting I went the other way around:
I took the -g 65:16:63 which is 33546240 bytes and made another disk image of that size and it is working, that was faster than trying to figure out the geometry of my real 32MB drive.

I know you solved it, but anyway.

Disks of the time were never, or almost never, exactly 33,554,432 bytes in size; they were a multiple of the cylinder size, which never or almost never was an exact power of 2 like that number is - typical sectors per head were 17 which is certainly not a power of 2. But if you really, really want to use that size, you can use -g 128:16:32

jca wrote: ↑Fri Jun 24, 2022 2:31 pm Very important:
You must install the exe file contained in the attached zip and make sure to run it before loading a different core.

Thanks a lot! With that, the heads of my SD card will be safe.

Posted: **Fri Jun 24, 2022 11:38 pm**

What about implementing what Sorgelig suggested, but in a separate "IDE controller" ROM?

Posted: **Sat Jun 25, 2022 12:21 am**

spark2k06 wrote: ↑Fri Jun 24, 2022 2:33 pm @kitune-san, I'm making a revert of the latest changes, up to the changes corresponding to beta 1.0... my experience with GitHub is not very complete so I haven't finished it yet, I will do it.

I'll tell you why. Finally the latest proposed improvements in DMA seem to be affecting the loading of the HD image via serial port, but specifically in the Juko ST BIOS, in Sergey's BIOS it works. However, before this change the image loading works fine on both.

As for the keyboard improvement proposal, I have to do more tests, but although it works fine again in the 8088 BIOS, it doesn't seem to work well in Juko ST, this is my feeling, I have to test it more and today I won't have more time for it.....

I'll let you know what's new or more details about it. Nevertheless, thanks for the huge effort you are doing to improve all these aspects.

Okay. Please revert that commit.
I think that the uart module is failing to read the address when the bus switches from DMA to CPU. (The uart module latches the address when the /read signal switches from H->L).
BIOS differences should be investigated.

The keyboard issue seems to be occurring at random times.

First, I will try timing constraints.
Most of the clocks are unconstrained and it is time to take action. Even if not relevant to this issue.

Posted: **Sat Jun 25, 2022 12:23 am**

I had not tried XTIDE until today, so I will try this one as well.

Posted: **Sat Jun 25, 2022 2:56 am**

kitune-san wrote: ↑Sat Jun 25, 2022 12:21 am First, I will try timing constraints.
Most of the clocks are unconstrained and it is time to take action. Even if not relevant to this issue.

As a test, clk_14_318, clk_4_77, and peripheral_clock were added to clock.(generated_clock)
If you have the time, please give it a try.

PCXT_20220625.zip: (1.04 MiB) Downloaded 97 times

Posted: **Sat Jun 25, 2022 5:05 am**

kitune-san wrote: ↑Sat Jun 25, 2022 2:56 am
kitune-san wrote: ↑Sat Jun 25, 2022 12:21 am First, I will try timing constraints.
Most of the clocks are unconstrained and it is time to take action. Even if not relevant to this issue.
As a test, clk_14_318, clk_4_77, and peripheral_clock were added to clock.(generated_clock)
If you have the time, please give it a try.

PCXT_20220625.zip

I have already left the repository clean on the main branch, in beta 1.0 status, corresponding to the last version released for general use.

Regarding this version that you have provided us, positive aspects compared to beta 1.0:

The keyboard always seems to work correctly, in all BIOS... also in Juko ST.
The original IBM 5160 BIOS doesn't show error 101, it gives error 601 but that's normal, due to lack of floppy disk controller. Now, it is even possible to enter the BASIC ROM you have, by pressing F1 when the message is displayed, to continue despite the error 601.
There is one game that didn't work before, that now works... it's Bubble Bobble, but with the PC Speaker music speeded up.

Negative aspects compared to beta 1.0:

In the SuperSoft test, it fails INT 0.
Juko ST often doesn't load the OS correctly via UART, although with Sergey's 8088 BIOS it always loads.

Posted: **Sat Jun 25, 2022 7:33 am**

kitune-san wrote: ↑Sat Jun 25, 2022 2:56 am
kitune-san wrote: ↑Sat Jun 25, 2022 12:21 am First, I will try timing constraints.
Most of the clocks are unconstrained and it is time to take action. Even if not relevant to this issue.
As a test, clk_14_318, clk_4_77, and peripheral_clock were added to clock.(generated_clock)
If you have the time, please give it a try.

PCXT_20220625.zip

This boots ok with my sdram (I could not boot with the previous version), but juko's bios does not read hard disks.

Posted: **Sat Jun 25, 2022 9:05 am**

Thanks for the feedback.
The reason it loads fine in Sergey's 8088 BIOS is probably because it does not use DMA.
Sorry, I do not have the disk image ready for boot right now. Please give me some time to check the symptoms.

I can assume why INT0 fails, but I am wondering if this measure is the right fix.

Posted: **Sat Jun 25, 2022 9:22 am**

hi

i have keyboard issue with that version ...

it stop working after some time

Posted: **Sat Jun 25, 2022 10:48 am**

kitune-san wrote: ↑Sat Jun 25, 2022 9:05 am Thanks for the feedback.
The reason it loads fine in Sergey's 8088 BIOS is probably because it does not use DMA.
Sorry, I do not have the disk image ready for boot right now. Please give me some time to check the symptoms.

I can assume why INT0 fails, but I am wondering if this measure is the right fix.

It makes perfect sense, I didn't remember that, indeed, Sergey's BIOS doesn't make use of DMA.

Posted: **Sat Jun 25, 2022 11:32 am**

last version seem to be about 15% slowest than before

Posted: **Sat Jun 25, 2022 12:15 pm**

After PCXT core 20220523 update, setting in MISTER.ini is not recognized. I need to adjust the mister.ini settings because I need to use the lcd monitor connected to the io board vga 15pin port. Fix please.

Posted: **Sat Jun 25, 2022 12:20 pm**

suww37 wrote: ↑Sat Jun 25, 2022 12:15 pm After PCXT core 20220523 update, setting in MISTER.ini is not recognized. I need to adjust the mister.ini settings because I need to use the lcd monitor connected to the io board vga 15pin port. Fix please.

At the moment, the core only works over HDMI, not VGA.

Posted: **Sat Jun 25, 2022 12:40 pm**

I am building up a FreeDOS version of the hdd.img and adding MyMenu and some shareware games to it so people have something easy to share and test with. FreeDOS's command and system are much heavier on base memory so I am working to integrate 4DOS. 4DOS is struggling with memory addressing in the core but works fine in PCem with the Juko ST bios.

Also spent some time with USE!UMB (v2.1 that allows for custom addressing to be passed at runtime) and DOSMAX last night, but didn't make any progress beyond corrupting the memory space. If anything I will have an image with all of that setup and ready if it ever does start working. Games all seem fine for the 12 or so that I have tested so far. The speed of hdd/COM setup is a clear limit when comparing to the exact same PCem setup, but HEY IT WORKS!!!!

LFNDOS works for Long File Name support (also a memory hog) but it is so nice to have long file names for MyMenu. MyMenu is fast and has a few issues, I did configure the Explosiv! screensaver for MCGA and it works great.

I'll post a link when I feel like I have it stable enough.

Posted: **Sat Jun 25, 2022 12:58 pm**

At the moment, the core only works over HDMI, not VGA.
[/quote]

I know it. However, I am using the lcd monitor by connecting the io vga port to hdmi using a converter. Therefore, the following settings are required in mister.ini. direct_video=0 Other cores use the HDMI port of D-nano board, and cores use direct_video=1. Therefore Individual configuration is required for each core in mister.ini, but your latest PCXT cores prevents individual configuration.

Posted: **Sat Jun 25, 2022 12:59 pm**

spark2k06 wrote: ↑Sat Jun 25, 2022 12:20 pm
suww37 wrote: ↑Sat Jun 25, 2022 12:15 pm After PCXT core 20220523 update, setting in MISTER.ini is not recognized. I need to adjust the mister.ini settings because I need to use the lcd monitor connected to the io board vga 15pin port. Fix please.
At the moment, the core only works over HDMI, not VGA.

I know it. However, I am using the lcd monitor by connecting the io vga port to hdmi using a converter. Therefore, the following settings are required in mister.ini. direct_video=0 Other cores use the HDMI port of D-nano board, and cores use direct_video=1. Therefore Individual configuration is required for each core in mister.ini, but your latest PCXT cores prevents individual configuration.

Posted: **Sat Jun 25, 2022 1:10 pm**

suww37 wrote: ↑Sat Jun 25, 2022 12:59 pm
spark2k06 wrote: ↑Sat Jun 25, 2022 12:20 pm
suww37 wrote: ↑Sat Jun 25, 2022 12:15 pm After PCXT core 20220523 update, setting in MISTER.ini is not recognized. I need to adjust the mister.ini settings because I need to use the lcd monitor connected to the io board vga 15pin port. Fix please.
At the moment, the core only works over HDMI, not VGA.
I know it. However, I am using the lcd monitor by connecting the io vga port to hdmi using a converter. Therefore, the following settings are required in mister.ini. direct_video=0 Other cores use the HDMI port of D-nano board, and cores use direct_video=1. Therefore Individual configuration is required for each core in mister.ini, but your latest PCXT cores prevents individual configuration.

Exactly, with which of the most recent release in the releases folder does it work for you... to check what changes have been made that might affect it, because I would say that there are no changes related to the video.

Posted: **Sat Jun 25, 2022 1:27 pm**

spark2k06 wrote: ↑Sat Jun 25, 2022 1:10 pm
suww37 wrote: ↑Sat Jun 25, 2022 12:59 pm
spark2k06 wrote: ↑Sat Jun 25, 2022 12:20 pm

At the moment, the core only works over HDMI, not VGA.
I know it. However, I am using the lcd monitor by connecting the io vga port to hdmi using a converter. Therefore, the following settings are required in mister.ini. direct_video=0 Other cores use the HDMI port of D-nano board, and cores use direct_video=1. Therefore Individual configuration is required for each core in mister.ini, but your latest PCXT cores prevents individual configuration.
Exactly, with which of the most recent release in the releases folder does it work for you... to check what changes have been made that might affect it, because I would say that there are no changes related to the video.

PCXT_20220507.rbf
PCXT_20220510.rbf
PCXT_20220512.rbf

-> misiter.ini individual configuration is available.

PCXT_20220523.rbf ~ PCXT_20220613.rbf
-> misiter.ini individual configuration is not available.

Posted: **Sat Jun 25, 2022 1:53 pm**

suww37 wrote: ↑Sat Jun 25, 2022 1:27 pm
PCXT_20220507.rbf
PCXT_20220510.rbf
PCXT_20220512.rbf

-> misiter.ini individual configuration is available.

PCXT_20220523.rbf ~ PCXT_20220613.rbf
-> misiter.ini individual configuration is not available.

Ok. That seems very random, it could be a problem with the timings, if I find out something about the possible reason, I'll let you know.

Posted: **Sat Jun 25, 2022 2:36 pm**

2Mb EMS, soon...

: PCXT_EMS_2MB.jpg (93.47 KiB) Viewed 1950 times

I need to do some extensive testing first, but it looks good

Posted: **Sat Jun 25, 2022 6:14 pm**

I found this BIOS which includes this FDD bios, not sure if it's useful
FDC344 - Ably-Tech Unique 4-Drive Floppy Controller v4.2

https://sourceforge.net/projects/openso ... cxtbios25/

Posted: **Sun Jun 26, 2022 2:28 am**

kitune-san wrote: ↑Sat Jun 25, 2022 9:05 am The reason it loads fine in Sergey's 8088 BIOS is probably because it does not use DMA.

Now I know why.
During DMA transfer, io_write=L, memory_read=L.
Wrong data is written when the DMA transfer address matches the uart address.
That is, (~address_enable) is necessary for the chip select(uart_cs) selection condition.

Posted: **Sun Jun 26, 2022 3:53 am**

kitune-san wrote: ↑Sun Jun 26, 2022 2:28 am
kitune-san wrote: ↑Sat Jun 25, 2022 9:05 am The reason it loads fine in Sergey's 8088 BIOS is probably because it does not use DMA.

Now I know why.
During DMA transfer, io_write=L, memory_read=L.
Wrong data is written when the DMA transfer address matches the uart address.
That is, (~address_enable) is necessary for the chip select(uart_cs) selection condition.

Well spotted! As for the INT 0 error, have you found out why?

Posted: **Sun Jun 26, 2022 8:12 am**

I have already added the following feature to the GitHub repository:

2Mb EMS memory compatible with the LTEMM application modified by Lo-tech:

https://www.lo-tech.co.uk/wiki/LTEMM.EXE

Memory mapped to A000 by default, but selectable to A000, C000, D000 and E000 from the OSD menu. It is also possible to disable it to have additional 64Kb available in high memory (UMB).

Along with an improved display system, it is now possible to display the core also in VGA, in addition to HDMI, thanks to @somhi.

@kitune-san, the Main branch would be updated... I've also added the UART fix, if you like add your improvements and let's try

Posted: **Sun Jun 26, 2022 9:10 am**

Sorry. Still investigating. There may be other causes.
The uart fix in the main branch is ok.

Posted: **Sun Jun 26, 2022 10:32 am**

Beta 1.1

Lo-Tech 2Mb EMS
Fix in UART access
video vectors corrected, sdc constraints for sdram, minor tipos to clear warnings

https://github.com/spark2k06/PCXT_MiSTe ... aacc29ca9f

Posted: **Sun Jun 26, 2022 1:04 pm**

spark2k06 wrote: ↑Sun Jun 26, 2022 10:32 am Beta 1.1

Lo-Tech 2Mb EMS

Fix in UART access

video vectors corrected, sdc constraints for sdram, minor tipos to clear warnings

https://github.com/spark2k06/PCXT_MiSTe ... aacc29ca9f

I tried to run PCXT beta 1.1 core, but as before, it failed to output from the lcd monitor connected to the vga port of the io board. Of course, the output to the HDMI port of the D-nano board works well. Perhaps my guess is that your lastest PCXT core doesn't allow individual settings in "mister.ini". Usually, individual settings for other cores of MiSTer are set by the sd card's core name(PCXT) in the "games" folder. Please check

Posted: **Sun Jun 26, 2022 1:20 pm**

suww37 wrote: ↑Sun Jun 26, 2022 1:04 pm
spark2k06 wrote: ↑Sun Jun 26, 2022 10:32 am Beta 1.1

Lo-Tech 2Mb EMS

Fix in UART access

video vectors corrected, sdc constraints for sdram, minor tipos to clear warnings

https://github.com/spark2k06/PCXT_MiSTe ... aacc29ca9f

I tried to run PCXT beta 1.1 core, but as before, it failed to output from the lcd monitor connected to the vga port of the io board. Of course, the output to the HDMI port of the D-nano board works well. Perhaps my guess is that your lastest PCXT core doesn't allow individual settings in "mister.ini". Usually, individual settings for other cores of MiSTer are set by the sd card's core name(PCXT) in the "games" folder. Please check

I don't know how to fix it, if anyone knows, please make a pull request....
I will check that everything works fine and accept it.

Posted: **Sun Jun 26, 2022 1:35 pm**

spark2k06 wrote: ↑Sun Jun 26, 2022 1:20 pm
suww37 wrote: ↑Sun Jun 26, 2022 1:04 pm
spark2k06 wrote: ↑Sun Jun 26, 2022 10:32 am Beta 1.1

Lo-Tech 2Mb EMS

Fix in UART access

video vectors corrected, sdc constraints for sdram, minor tipos to clear warnings

https://github.com/spark2k06/PCXT_MiSTe ... aacc29ca9f

I tried to run PCXT beta 1.1 core, but as before, it failed to output from the lcd monitor connected to the vga port of the io board. Of course, the output to the HDMI port of the D-nano board works well. Perhaps my guess is that your lastest PCXT core doesn't allow individual settings in "mister.ini". Usually, individual settings for other cores of MiSTer are set by the sd card's core name(PCXT) in the "games" folder. Please check
I don't know how to fix it, if anyone knows, please make a pull request....
I will check that everything works fine and accept it.

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