The goal of the project is to:
- Implement the Mega65 core on MiSter
- Do it in such a way that it is easy to update from their upstream so we can benefit from their continued development.
- As such, I have implemented their repo as a module in mega65-mister (at rtl/mega65/
- Code above the tree at rtl/mega65 (in rtl/) will be used to implement a functional wrapper around the mega65 core, interfacing its devices in a MiSTer compatible way.
- BRAM is overused in Mega65. We need to swap out much of their BRAM with a SDRAM interface.
[**]There is a huge advantage to this as well. The MiSTer version will have much more RAM than the actual version.
- Identify and remove all test modules from the core. It will just eat up our LEs.
- Identify and replace all modules that interface with their hardware.
[**]A strategy to do this, includes simply removing the files from the qip's in our build that interface with their external interfaces, and replacing them with MiSTer interfaces instead. This also saves LEs.
Alright guys lets do this. LEEEEEEEROOOOYYYYY JEEEENNNNKINNNNSSSS!