PDP2011 port to MiSTer FPGA

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PDP2011 port to MiSTer FPGA

Unread post by rampa »

PDP2011 port to MiSTer FPGA

PDP2011 Overview

This is a MiSTer port of PDP2011 – a re-creation of the well known series of PDP-11 computer systems in VHDL. Everything that is needed to run a PDP-11 system is included; you can run a complete Unibus PDP-11 system with console, disks and other peripherals on a simple low cost FPGA development board. The original V5-V7 versions of Unix, BSD 2.11, and the original DEC operating systems for the PDP-11 work.

Highlights:

  • You can configure PDP2011 to be 11/20, 11/34, 11/44, 11/45, 11/70 or 11/94. This also sets up 18- or 22-bit memory management, special instructions like MARK and MTPS/MFPS, EIS instructions, and FIS or FPU. The model specific instructions and the most important differences between the system models are implemented to the point that many of the original MAINDEC test programs run without error.

  • There are disk controllers for RK, RL and RM/RP disks; these use SD cards (or disk images) to store the disk on.

  • The system can be hooked up to a network; it includes a DEUNA compatible Ethernet frontend that works with the ENC424J600 Ethernet chip (as on Digilent’s PMODNIC100); you can run DECNET on RSTS and RSX, or TCP/IP on 2.11BSD.

  • The PDP2011 project includes a terminal core to interface to a screen (HDMI or VGA, but not 15khz) and keyboard. You can configure the terminal to be a vt100 or a vt105.

  • Mister UART port can be used as console (swapping it on OSD), additional terminal, Modem, SLIP networking (needs MisTER kernel change),links to other systems etc.

  • With the vt105 terminal you can display the MINC waveform graphics.

Known problems and limitations.

  • The RH controller for the RP/RM disks only support 1 disk drive.
  • The original RL distribution disk for RT-11 V5 crashes on boot. Everything works if you copy the distribution to RK though, and earlier versions work fine as well.

Future plans:

  • Wireless network! an alternative for the current DEUNA+PMODNIC100 that works wirelessly.
  • ESP32 software emulation running on ARM (if you dont want to hook an ethernet to SNAC port)
  • Hardware to support the PiDP11 console (Via SNAC port).

License:

The copyrights to the VHDL described on this core are held by Sytse Van Slooten. In short, you are allowed to run the core for personal use, but you can not use it commercially.

Disk images

  • You can download a disk image containing BSD2.11 form the original core download page.
  • Tested with a lot of images from the PiDP-11 project. For convenience, i have converted and renamed for easy use the nankervis images and have uploaded them to mega. You can get them here. All this images need a PDP11/70.

Networking

Networking at the moment is a bit tricky, and in all cases you have to do some hacking with hardware or firmware. You have two options here.


  • SLIP. You ned to change some files on the mister SD CARD. (have a look here),
  • Ethernet. I dont know if is possible to attach the network to the MiSTer ethernet. So at the moment, the only way to connect an ethernet to the core is via the SNAC connector (this "fake" USB blue connector on your IOBoard or DB9 connector on the Antonio Villena boards).
  • Two boards have been tested:

The actual wiring is:


PINSignal
USER_IO[0]MOSI
USER_IO[1]MISO
USER_IO[6]SCLK
USER_IO[3]CS
5V3v3 (I think the ethernet is 5V tolerant, but better to lower a bit)
GNDGND
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Re: PDP2011 port to MiSTer FPGA

Unread post by jca »

Thanks very much for this core.
I started it in 11/70 model, inserted the BSD disk image and it booted automatically, no need to do a reset.
It booted in single user, I typed D to go multiuser, logged in as root, no password needed.
Now, before going further I need to know how to shut it down properly in order not to destroy the FS. So far I did not find how to do it. Any help will be appreciated.

Edit: shutdown now works nicely but goes to single user mode. Is it OK to power down at this stage?

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Re: PDP2011 port to MiSTer FPGA

Unread post by rampa »

yes. is OK.

On these days, powerdown was:

Code: Select all

# sync
# sync
# sync

And poweroff....

If you run Unix III or Unix V or Unix 7 (you have it on the nankervis images) there was not shutdown or halt... that was the procesdure...

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Re: PDP2011 port to MiSTer FPGA

Unread post by jca »

Correction: the system did not boot automatically after mounting the disk, I had to type <Enter> at the : prompt.

After the shutdown command I typed sync;sync;halt to halt the system.
After reboot nothing is broken.

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Re: PDP2011 port to MiSTer FPGA

Unread post by jca »

Thanks for the post which I did not see as I was seeing what happens after syn;sync;halt and reboot.
The problem with these old Unix OSes is that the shutdown procedures varied.

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Re: PDP2011 port to MiSTer FPGA

Unread post by thera34 »

Thank you for this core !

I hope we'll have SLIP support integrated as well in main at some point, since more cores and OSes benefit from it :)

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Re: PDP2011 port to MiSTer FPGA

Unread post by Moondandy »

Oh wow, congrats on the core! Are you planning to add it to Main for an official release?

What actually is SLIP?

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Re: PDP2011 port to MiSTer FPGA

Unread post by Malor »

Moondandy wrote: Sun Dec 11, 2022 6:35 pm

Oh wow, congrats on the core! Are you planning to add it to Main for an official release?

What actually is SLIP?

It stands, I believe, for Serial Line Internet Protocol. It's a more primitive version of PPP, allowing two cooperating machines to use a serial link for TCP/IP traffic directly. The hosting machine needs a daemon running as root to be able to fully proxy an IP down the serial link.

There's a lesser program called SLiRP that simulates SLIP in user mode; it works kind of like NAT, in that you run the SLiRP daemon remotely as a non-root user, SLIP locally, and then SliRP forwards packets for you. Like with NAT, it can't forward arbitrary incoming traffic from the outside net, it can only forward packets from inside to outside, and then send the return traffic back to the client. You can set it to open a dedicated listener on a non-root port (above 1024) and forward that to the local machine, however.

Full SLIP (or PPP) will expose all your local machine's ports, so you definitely want an external firewall involved. If you think your local network might attack the ancient software running on one of these cores, using SLiRP without port forwarding will give you pretty safe Internet access for them. This might be particularly useful if old versions of Windows ever become common on the Mister, as many of them are wildly insecure when connected to the network.

SLiRP was originally used to convert command-line Unix accounts into fairly complete outbound Internet access accounts instead. It was never intended, I don't believe, as a security measure, just a hack to work around stupid providers that didn't offer real Internet. But because it resembles NAT so strongly, it happens to be a security enhancer.

It's very old software, and might be buggy itself, so I still wouldn't expose it directly to the Internet.

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Re: PDP2011 port to MiSTer FPGA

Unread post by rampa »

I have slirp compiled on the mister, and works ok if I enter a shell on the machine and start slirp, but cannot start it on the serial port without being logged on that port. There is an environment variable for that. But seems it is not working.. 😠

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Re: PDP2011 port to MiSTer FPGA

Unread post by rampa »

I had an ISP on the 90's and this was a big help with modem users...

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Re: PDP2011 port to MiSTer FPGA

Unread post by Malor »

That sounds like a permission problem. Do you happen to know what device names the faux serial devices show up with? I assume they must be visible from the Linux side.

edit: after reviewing ppp_options, it looks like it hooks up to /dev/ttyS1. That's set as group read/write dialout, so if you're trying to use that as a non-root user, make sure to add that user to the dialout group. If you're running as root, it should work automatically.

I think maybe ppp starts automatically, so you might need to disable that if you want to use SLiRP instead. I'm trying to figure out how ppp is started, so you can disable it.

second edit: after some experimentation, it looks like the Amiga core automatically launches the ppp daemon, and then closes it when it exits. Assuming there's no SLIP for the PDP2011 core to start, and that it's using the same allocation system that the Amiga is, then at least theoretically, you should be able to connect SLiRP to /dev/ttyS1. You should be able to launch it with /etc/inittab, but keep in mind that it will probably hold a lock on the port, so that you can't use PPP networking with other cores while it's running. And you may need to give it some kind of 'detach' argument to get it to run as a daemon, instead of from a user console as it was intended.

Worst case, you should be able to daemonize it with the "screen" program, but that's a pretty hacky solution.

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Re: PDP2011 port to MiSTer FPGA

Unread post by rampa »

No, no permissions problem. It was designed as s user program and seems nobody used it as a Daemon. In the past I remember have used it like that to give network to my use palm pilot.... But don't remember how.

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Re: PDP2011 port to MiSTer FPGA

Unread post by Malor »

If SliRP doesn't have some kind of 'daemonize' or 'detach' argument, you can probably launch it with the 'screen' utility, which provides a virtual console. Screen is usually used to give you a persistent terminal that survives disconnects, and can be used to daemonize a program that was written to be command-line only.

You'll have to work out how, though, because I don't have any reasonable way to test it here. It's probably just "screen /path/to/SLiRP -argumentlist", but I can't check to be sure.

edit: screen is in the default MiSTer distro, so it's easy to use. You'll have to read its man pages on a different system, though.

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Re: PDP2011 port to MiSTer FPGA

Unread post by billsalt42 »

Really nice work, thank you for taking this on and doing a great job!

PDP-8 anyone? I can ask...

Thanks again!

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Re: PDP2011 port to MiSTer FPGA

Unread post by rampa »

I use screen everyday. But I need the opposite. Don't need a connection to the remote machine . I need to respawn the program on a serial tty without login. (May be agetty)It is supposed to be done with an environment variable. But no luck...

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Re: PDP2011 port to MiSTer FPGA

Unread post by thisisamigaspeaking »

The PDP2011 project includes a terminal core to interface to a VGA screen and PS2 keyboard. You can configure the terminal to be a vt100 or a vt105.

VGA and PS2 only, or HDMI and USB as well?

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Re: PDP2011 port to MiSTer FPGA

Unread post by jca »

The text where this sentence comes from was not written for MISTer but for FPGA development boards which usually have VGA output and PS2 keyboards or on which such devices can be added if not present - using PMOD boards for example. So it can be misleading for the MISTer port, like the stuff about the SD card.
On MISTer it works like a regular MISTer core with HDMI and USB keyboard, I don't have a CRT so I am unable to comment on that. It also uses disk images in the game directory.

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Re: PDP2011 port to MiSTer FPGA

Unread post by Malor »

rampa wrote: Sun Dec 11, 2022 10:54 pm

I use screen everyday. But I need the opposite. Don't need a connection to the remote machine . I need to respawn the program on a serial tty without login. (May be agetty)It is supposed to be done with an environment variable. But no luck...

Right, which is why you can use screen. This may not be the 'correct' way to do this, but it should work.

Your goal: run SLiRP persistently.

Your problem: SLiRP appears to require an active terminal to run from.

Solution: a screen session will provide a persistent terminal and allow you to launch a program to run persistently within it.

Screen does a lot of stuff. It can also be an excellent serial terminal, talking directly to a TTY and reflecting the results to the console. It sounds like that's how you're using it. But its primary purpose is to give you a persistent user session that stays alive even when you disconnect. And it just so happens that this is exactly what SLiRP may need.

I have not studied SLiRP itself. If it has a detach method, use that instead.

edit: note that if SLiRP requires TCP packet input from the console, it'll be much trickier to get it running. If it can be set to listen to an arbitrary serial port, using command-line arguments, screen should provide it the persistent virtual terminal session it appears to need.

second edit: If you need to respawn SLiRP after it exits, have screen run a bash session aimed at a script that does that. Voila, persistent SLiRP.

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Re: PDP2011 port to MiSTer FPGA

Unread post by jca »

If you go to the first link in the first post which announces the MISTer core you will see that the original core was developed on a FPGA development board and has been ported to 10 different boards. The MISTer version is the latest port which is not yet on the official repository and thus does not have a readme for MISTer.

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Re: PDP2011 port to MiSTer FPGA

Unread post by Malor »

Another option would be to write a script that exports the environment variable SliRP wants, whatever it is, and then launches the binary. If you need it to relaunch after exit, you'd put it in a loop construct. Then run the script directly from /etc/inittab.

That will probably also work, but I don't have this core running and don't have a good way to test it. It saves the overhead of screen, so it's probably better overall. If it works.

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Re: PDP2011 port to MiSTer FPGA

Unread post by rampa »

thisisamigaspeaking wrote: Sun Dec 11, 2022 11:32 pm

The PDP2011 project includes a terminal core to interface to a VGA screen and PS2 keyboard. You can configure the terminal to be a vt100 or a vt105.

VGA and PS2 only, or HDMI and USB as well?

Changed, thanks. It support HDMI and VGA, but not 15khz rgb.... And the keyboard, yes. The standard USB keyboard.

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Re: PDP2011 port to MiSTer FPGA

Unread post by pgimeno »

rampa wrote: Sat Dec 10, 2022 9:06 pm

License:

The copyrights to the VHDL described on this core are held by Sytse Van Slooten. In short, you are allowed to run the core for personal use, but you can not use it commercially.

Isn't it using the GPL'd framework? If so, the whole work falls under the GPL, which explicitly prohibits imposing further restrictions.

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Re: PDP2011 port to MiSTer FPGA

Unread post by rampa »

pgimeno wrote: Mon Dec 12, 2022 9:40 pm
rampa wrote: Sat Dec 10, 2022 9:06 pm

License:

The copyrights to the VHDL described on this core are held by Sytse Van Slooten. In short, you are allowed to run the core for personal use, but you can not use it commercially.

Isn't it using the GPL'd framework? If so, the whole work falls under the GPL, which explicitly prohibits imposing further restrictions.

Systse can use wathever license. I have used his sources (asking permission, of course) to use them on mister. So this is the license and I am not going to change it.

If you are not happy with that, I'm sorry

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Re: PDP2011 port to MiSTer FPGA

Unread post by thisisamigaspeaking »

Not sure what the "GPL'd framework" is here, but the point is you can't combine restrictive licenses with GPL code in the same software.

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Re: PDP2011 port to MiSTer FPGA

Unread post by rampa »

Stop the war in this thread (and if you want we can open another one)

You CAN mix non GPL with GPL. please read the GPL V3.

I know the mister framework is published under GPL. and i am sure you can mix licenses. Dont know why people thinks this cannot be done.

https://www.gnu.org/licenses/gpl-faq.html#combining

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Re: PDP2011 port to MiSTer FPGA

Unread post by pgimeno »

Don't take me wrong, I've been wishing for a PDP-11 core for a long time - even tried to make this Russian clone work but I had serious stability problems for me that I couldn't solve. I'd be really happy to use it. But if betraying the spirit of free software is the means to have it, then thanks, but no, thanks. And this thread is the correct place to discuss it because I believe this core should not have been published in the first place. And this is not a war, I'm just providing information on why.

The framework is under GPL version 2 or later:

// ... either version 2 of the License, or (at your option)
// any later version.

https://github.com/MiSTer-devel/Templat ... alsa.sv#L8

Version 2 section 6 specifies:

You may not impose any further
restrictions on the recipients' exercise of the rights granted herein.

https://github.com/MiSTer-devel/Templat ... CENSE#L192

And version 3 has similar wording in section 10:

You may not impose any further restrictions on the exercise of the
rights granted or affirmed under this License.

https://www.gnu.org/licenses/gpl-3.0.txt

As for the link you provided, yes, you can link GPL with non-GPL software, as long as the license of the non-GPL software is compatible with the GPL. That's not the case here, because the restriction of not using it for commercial purposes IS an additional restriction prohibited by the GPL. See an example of a license that isn't compatible because it imposes an additional restriction, here: Why is the original BSD license incompatible with the GPL?

More relevant information:

What legal issues come up if I use GPL-incompatible libraries with GPL software?
Relevant quote:

Only the copyright holders for the program can legally release their software under these terms.

You are not the copyright holder of either the framework or the PDP module.

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Re: PDP2011 port to MiSTer FPGA

Unread post by rampa »

Only the copyright holders for the program can legally release their software under these terms.
You are not the copyright holder of either the framework or the PDP module.

As everything i do (not only with non GPL. Also with GPL), I asked permission to the author. The author himself has a mister..... So i have writen permission to port it.

If you feel YOU are violating the license (eg. you wantto sell it) you can wipe the file from your disk. I cannot do anything more.

And no more on licenses.... please....

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Re: PDP2011 port to MiSTer FPGA

Unread post by ron »

pgimeno wrote: Tue Dec 13, 2022 11:18 am

Don't take me wrong, I've been wishing for a PDP-11 core for a long time - even tried to make this Russian clone work but I had serious stability problems for me that I couldn't solve. I'd be really happy to use it. But if betraying the spirit of free software is the means to have it, then thanks, but no, thanks. And this thread is the correct place to discuss it because I believe this core should not have been published in the first place. And this is not a war, I'm just providing information on why.

The framework is under GPL version 2 or later:

// ... either version 2 of the License, or (at your option)
// any later version.

https://github.com/MiSTer-devel/Templat ... alsa.sv#L8

Version 2 section 6 specifies:

You may not impose any further
restrictions on the recipients' exercise of the rights granted herein.

https://github.com/MiSTer-devel/Templat ... CENSE#L192

And version 3 has similar wording in section 10:

You may not impose any further restrictions on the exercise of the
rights granted or affirmed under this License.

https://www.gnu.org/licenses/gpl-3.0.txt

As for the link you provided, yes, you can link GPL with non-GPL software, as long as the license of the non-GPL software is compatible with the GPL. That's not the case here, because the restriction of not using it for commercial purposes IS an additional restriction prohibited by the GPL. See an example of a license that isn't compatible because it imposes an additional restriction, here: Why is the original BSD license incompatible with the GPL?

More relevant information:

What legal issues come up if I use GPL-incompatible libraries with GPL software?
Relevant quote:

Only the copyright holders for the program can legally release their software under these terms.

You are not the copyright holder of either the framework or the PDP module.

You definitely have a problem. I don't see anything, but absolutely nothing that violates any license. If you really wanted a PDP11 core you wouldn't be saying so much nonsense.

rampa is allowed by Sytse Van Slooten, what else do you need ? As said before: The gpl license allows combination. And of course, if deep inside you think you are doing something wrong, you can always erase the core of your machine by running a Deep erase software.....

The copyrights to the VHDL described on this core are held by Sytse Van Slooten. In short, you are allowed to run the core for personal use, but you can not use it commercially.

Perhaps you intend to generate a drama where it does not exist. What do you mean with so much verbiage?

I think you still have a problem, obviously there is only in your mind. With this attitude, in addition to destroying the work of people who dedicate their time unconditionally, altruistically and disinterestedly, users like you are the ones who make coders lose their desire and enthusiasm when implementing projects. Or is it possible that you are a genius and know everything and can implement the core yourself ?. I'm intrigued, you'll tell me what is exactly what you want.

Without acrimony.

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Re: PDP2011 port to MiSTer FPGA

Unread post by pgimeno »

This is not about receiving permission to use the PDP code, it's about receiving permission to use the framework. The framework is licensed under the GPL and contains code from Sorgelig, wickerwaka, Robert Peip, zakk4223, matijaerceg, skooterblog, paulb-nl, Jotego, Grabulosaure and others (see https://github.com/MiSTer-devel/Templat ... its/master ). All these people have agreed to distribute their contributions under the GPL. The PDP module links with the framework, and according to the GPL, the result must also be licensed under the GPL, which explicitly prohibits imposing additional restrictions like not using the result for commercial purposes, therefore the licenses are not compatible.

@rampa: Correct me if I'm wrong but I don't think you have asked permission from each of the copyright holders on the framework, for releasing their code under a license that is not compatible with the GPL, because of the additional restriction of no commercial use.

You may argue that the choice of the GPL for the framework is questionable, because it limits usages like this one, and I would agree, but unfortunately it's what we have currently.

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Re: PDP2011 port to MiSTer FPGA

Unread post by thisisamigaspeaking »

rampa wrote: Tue Dec 13, 2022 8:22 am

Stop the war in this thread (and if you want we can open another one)

You CAN mix non GPL with GPL. please read the GPL V3.

I know the mister framework is published under GPL. and i am sure you can mix licenses. Dont know why people thinks this cannot be done.

https://www.gnu.org/licenses/gpl-faq.html#combining

Again I don't understand what the framework is in this context, but from your link:

If a library is released under the GPL (not the LGPL), does that mean that any software which uses it has to be under the GPL or a GPL-compatible license? (#IfLibraryIsGPL)
Yes, because the program actually links to the library. As such, the terms of the GPL apply to the entire combination. The software modules that link with the library may be under various GPL compatible licenses, but the work as a whole must be licensed under the GPL. See also: What does it mean to say a license is “compatible with the GPL”?

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