MiSTer FPGA Forum

Let me introduce myself a bit, I grown up as an embedded software engineer with some analog/digital circuits development in my background
A few years ago I was developing some sort of a home-brew "gaming console" (wouldn't call it like that though) using stm32 microcontrollers, so I managed to port a few games on my board, such as doom, quake I, II (buried now), duke nukem ... But my real goal was to port Killing Time from 3DO console, but unfortunately the only person who has sources (It's Rebecca Heinemann) has some licensing issues going on. Then I started looking at 3DO emulation instead, and since there are plenty of software emulators already, I came up with an idea to implement one on FPGA, and so here I am

I just started my way to this, literally I just ordered one of these Xilinx board (which is Kria K26, or something), and would really appreciate if anyone wants to join this journey, I have got a plan, I believe

PS: for anyone curious about games I listed in above running on stm32 board, please take a look :

https://www.youtube.com/channel/UCMXDf6 ... UGLl-1qQQw

So if anyone has any insights on this I would really appreciate it. I have not done this before, just did port some old games on my own home-brew console, so I'm new to this game console fpga core development at first glance the overall process looks like to me :

1. Grab SoC board with CPU and FPGA available
2. Get open source emulator, which is proven to be working
3. Build it for the given board
4. Replace sub systems with IP cores
5. Repeat 4 until whole port is done
6. TBD

Your proposal wont make a FPGA core. You seem to be porting an existing emulator. FPGA development is radically different. A 3DO is a very complex first project and I think you would be better off choosing an old 80's Arcade game to start on, if not just working on an exiting FPGA core and fixing some issues within it.

To give some example of scale Robert Peip, an experienced FPGA dev has taken 1 year to get the PSX FPGA core to its current state.

I've seen quite a few developers, including Robert Peip, start the development process with a cycle-accurate software emulator that they use to build the FPGA core. I suspect Roman, given his experience with embedded hardware, gets that. The approach of porting an emulator to a SoC board and then altering the emulator to rely more and more on the FPGA reminds me of the fabled "Hybrid Emulation" that regularly comes up.

I hope this project works out for him, but a hybrid emulator built on anything other than the DE-10 Nano is unlikely to be viable for the MiSTer project. The various FPGA boards vary in hardware architecture, not to mention having to work around the ways MiSTer already utilizes both the CPU and FPGA.

Thank you for replying to this, I see that Mister project is based on DE-10 Nano, I've been stick to use Xilinx boards, as for my regular job, so I think this could be an option. I really appreciate that someone has interest in that, so that motivates me !
My Xilinx SoC board is on its way, and I started trying this emulator as a base for my project (could build it so far):
https://github.com/gameblabla/3doh_gcw0

I could compile it, and in coming day would try to get in touch with the author (even it is a for of a "freedo" project though, they may have some experience with reversing hardware)
I would also contact back Rebecca Heinemann, as she was close to this console

Will keep you posted !

Good luck.
My own 3DO will never be sold, I have had it since the late 90s when they were all sold off really cheap. I have the Panasonic Real FZ-1, and I just love it's 90s aesthetics.

Come to the 3DO discord. We have more documents and help than you could ever need!

https://discord.gg/f8ggdSC3Qs

Roman wrote: ↑Mon Mar 20, 2023 9:02 pm

Thank you for replying to this, I see that Mister project is based on DE-10 Nano, I've been stick to use Xilinx boards, as for my regular job, so I think this could be an option. I really appreciate that someone has interest in that, so that motivates me !
My Xilinx SoC board is on its way, and I started trying this emulator as a base for my project (could build it so far):
https://github.com/gameblabla/3doh_gcw0

I could compile it, and in coming day would try to get in touch with the author (even it is a for of a "freedo" project though, they may have some experience with reversing hardware)
I would also contact back Rebecca Heinemann, as she was close to this console

Will keep you posted !

Yeah, definitely come over to the Discord. We have myself (maintainer of Opera emulator and run 3dodev.com), Fixel (author of Freedo and the recent ODE), as well as a few original 3DO developers and current homebrew authors.

Wow !
one of the exciting but not successful consoles

It has these unique ports like NFS, Wolfstein, Road Rash, Another world.

jordi wrote: ↑Tue Mar 21, 2023 12:53 pm

It has these unique ports like NFS, Wolfstein, Road Rash, Another world.

And the exclusive Way of the Warrior! --> https://youtu.be/-_Ya4mSkDMI

Would love this on the misterFPGA !

isn't FPGAzumSpass working on 3do core already?

Great News. I hope this becomes something really good. All the best.

3DO is often requested, so there is a large crowd of people who would appreciate that.

Some hints from my side, as someone who also writes a software emulator every time before the FPGA core:

Grab SoC board with CPU and FPGA available
Get open source emulator, which is proven to be working
Build it for the given board
Replace sub systems with IP cores
Repeat 4 until whole port is done

This is likely not going to work. The subsystems typically communicate much faster(latency) with each other than the CPU of the SoC FPGA could communicate with the FPGA fabric
You could maybe get something working, but it will be very inaccurate and leads to plenty of debugging.
I don't think it's a approach that is saving time in the end.

What i do instead:

• i write the software emulator in a way that already every component is triggered every clock cycle, not some event based system that most emulators use
  This way it's much easier to compare between FPGA and emulator

• add bus level exports for every major component in the emulator
  So e.g. to build a GPU, i capture all commands send from CPU to GPU to a file and simulate that for the FPGA without the rest of the system. Output of the simulated FPGA GPU and emulated software GPU are written to a file and must be 100% same in diff tool. Same for all other major components

Good one folks !
I've made so progress so far and here to share that with you
Note: haven't visited discord community so far, but going to
So:

1. Bring up of Xilinx Kria260 board is done, running basic linux stuff with monitor via hdmi
2. Build freedo emulator for it (with having SDL 1.2 library compiled), no sound and no joystick so far
3. Created shared memory (since that FPGA doesn't have required 3 mbytes dedicated memory) - so it will be used as shared ram + vram during early steps (Really slow one !, need to think about improving it with cache or so)
4. Put some madam stuff such as registers and variables to fpga
5. On early stage will be doing pure copy of freedo in HDL, since this is the only source I have, so event driven model. Haven't found any reliable description of MADAM hw so I can implement cycle accurate hdl

Next steps :

1. Implementing MADAM in HDL, step by step replacing SW modules with HDL ones
2. TBD

Thanks to everyone !
Will be posting further updates as soon as I have something !
Replying to @FPGAzumSpass - yes, you have your point here, but I needed something to start with without having any hardware..

vgesoterica wrote: ↑Tue Mar 21, 2023 2:19 am

Come to the 3DO discord. We have more documents and help than you could ever need!

https://discord.gg/f8ggdSC3Qs

Thank you so much, just created an account, will take a look my tomorrow time!

FPGAzumSpass wrote: ↑Tue Mar 21, 2023 4:22 pm

3DO is often requested, so there is a large crowd of people who would appreciate that.

Some hints from my side, as someone who also writes a software emulator every time before the FPGA core:

Grab SoC board with CPU and FPGA available
Get open source emulator, which is proven to be working
Build it for the given board
Replace sub systems with IP cores
Repeat 4 until whole port is done

This is likely not going to work. The subsystems typically communicate much faster(latency) with each other than the CPU of the SoC FPGA could communicate with the FPGA fabric
You could maybe get something working, but it will be very inaccurate and leads to plenty of debugging.
I don't think it's a approach that is saving time in the end.

What i do instead:

• i write the software emulator in a way that already every component is triggered every clock cycle, not some event based system that most emulators use
  This way it's much easier to compare between FPGA and emulator

• add bus level exports for every major component in the emulator
  So e.g. to build a GPU, i capture all commands send from CPU to GPU to a file and simulate that for the FPGA without the rest of the system. Output of the simulated FPGA GPU and emulated software GPU are written to a file and must be 100% same in diff tool. Same for all other major components

That makes sense for sure, but SW emulator is to be rewritten in that case, which I think I can't afford in the nearest future, in terms of time
Thanks a lot !