Hi,
I have been offline for a month working on a new core: SharpX1.
I thought it time now to give an update on the cores status:
CZ-800C model
This first core will be for the first model, the CZ-800C. I plan to move on to the X1Turbo once this first version is working.Implementation
At the moment, I have all parts integrated, the address decoder mapped, the IO ports wired correctly, the data MUX for the CPU is also working. I have stubbed the 8251, 8253 and the 8255. These are responding to the IPL BIOS, so its enough for now.
The PCG needs some work still, which is my current focus. The CRTC6845 has some timing issues as the IPL BIOS is trying to write to its registers, but having a few problems. I will be moving back to that shortly. For now, I have hardcoded the registers so that I get a video frame.
The CGROM is loaded on ioctl index 1 (IPL is index 0) and I can see the CGROM interacting with the rest of the system just fine.
The YAMAHA PSG (sound) has the correct clock, so that should work once I get onto audio testing later.
I have disassembled the IPL BIOS to instruction codes, so I can see what its trying to do also.Simulation
Im still at the simulation stage, and am debugging the IPL BIOS together with FST tracing in GTKWave and Verilator. I always follow this approach before hooking a core up to the MiSTer sys and moving over to Quartus for an FPGA release.
I'll update this post once I have more progress to share.
